Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752868AbaDYJQX (ORCPT ); Fri, 25 Apr 2014 05:16:23 -0400 Received: from mail-oa0-f45.google.com ([209.85.219.45]:37756 "EHLO mail-oa0-f45.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752101AbaDYJQS (ORCPT ); Fri, 25 Apr 2014 05:16:18 -0400 MIME-Version: 1.0 In-Reply-To: <20140424174741.GA23444@swsaberg01> References: <2386bd1367aa44741979461358a72dec89608597.1398335771.git.anders.berg@lsi.com> <20140424174741.GA23444@swsaberg01> Date: Fri, 25 Apr 2014 11:16:18 +0200 Message-ID: Subject: Re: [PATCH v2 3/6] ARM: dts: Device tree for AXM55xx. From: Linus Walleij To: Anders Berg Cc: Arnd Bergmann , Olof Johansson , Mike Turquette , Mark Rutland , Dmitry Eremin-Solenikov , David Woodhouse , Russell King , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Apr 24, 2014 at 7:47 PM, Anders Berg wrote: > On Thu, Apr 24, 2014 at 03:24:14PM +0200, Linus Walleij wrote: >> One interrupt per CPU core? >> >> The drivers for these blocks will really just grab the first IRQ and >> then I guess they >> will only be able to execute on CPU0. >> >> It's definately correct to list all the IRQs here, but how do you envision >> the drivers making use of them in the long run? > > It's one interrupt line per input pin (so with the current driver only the first pin > is usable as interrupt source). Hm I'm not sure I understand what a "pin" is in this concept ... being maintainer of the pin control subsystem and all that really triggers my interest. Yours. Linus Walleij -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/