Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754222AbaFBLn6 (ORCPT ); Mon, 2 Jun 2014 07:43:58 -0400 Received: from mga03.intel.com ([143.182.124.21]:30273 "EHLO mga03.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753921AbaFBLn4 (ORCPT ); Mon, 2 Jun 2014 07:43:56 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.98,956,1392192000"; d="scan'208";a="439803169" From: Chew Chiau Ee To: Eric Miao , Russell King , Haojian Zhuang , Mark Brown , Grant Likely , Rob Herring Cc: Darren Hart , Mika Westerberg , LKML , linux-arm-kernel@lists.infradead.org, linux-spi@vger.kernel.org, devicetree@vger.kernel.org, Chew Chiau Ee Subject: [PATCH 0/2] Add common clk framework support for PCI mode SPI PXA2XX Date: Tue, 3 Jun 2014 03:46:17 +0800 Message-Id: <1401738379-4107-1-git-send-email-chiau.ee.chew@intel.com> X-Mailer: git-send-email 1.7.4.4 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Chew, Chiau Ee SPI PXA2XX core layer depends on common clock framework to obtain information on host supported clock rate. Thus, we setup and register clock device for PCI mode host in SPI PXA2XX pci glue layer using common clock APIs. In addition, in order for PCI mode SPI PXA2XX with common clock framework support to be built as module, we need to export clk_register_clkdev(). Chew, Chiau Ee (1): spi/pxa2xx-pci: Add common clock framework support in PCI glue layer Darren Hart (1): clkdev: Export clk_register_clkdev drivers/clk/clkdev.c | 1 drivers/spi/spi-pxa2xx-pci.c | 20 ++++++++++++++++++++ 2 files changed, 21 insertions(+), 0 deletions(-) -- 1.7.4.4 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/