Message-ID: <539F665E.3060007@wwwdotorg.org>
Date: Mon, 16 Jun 2014 15:49:18 -0600
From: Stephen Warren <swarren@wwwdotorg.org>
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To: pdeschrijver@nvidia.com
CC: Mikko Perttunen <mperttunen@nvidia.com>, thierry.reding@gmail.com,
        tj@kernel.org, linux-arm-kernel@lists.infradead.org,
        linux-kernel@vger.kernel.org, linux-tegra@vger.kernel.org,
        linux-ide@vger.kernel.org
Subject: Re: [PATCH 4/9] clk: tegra: Enable hardware control of SATA PLL
References: <1401881559-18469-1-git-send-email-mperttunen@nvidia.com> <1401881559-18469-5-git-send-email-mperttunen@nvidia.com>
In-Reply-To: <1401881559-18469-5-git-send-email-mperttunen@nvidia.com>
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On 06/04/2014 05:32 AM, Mikko Perttunen wrote:
> This makes the SATA PLL be controlled by hardware instead of software.
> This is required for working SATA support.

Peter, could you please take patches 4 and 5 through the clock tree. As
far as I can tell, there's no compile-time dependency in the clock
patches, so they can go through a different tree to the rest of the
series without issue. These 2 patches look fine to me, so consider them:

Acked-by: Stephen Warren <swarren@nvidia.com>
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