Message-ID: <53A030DB.3090009@linaro.org>
Date: Tue, 17 Jun 2014 14:13:15 +0200
From: Daniel Lezcano <daniel.lezcano@linaro.org>
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To: Doug Anderson <dianders@chromium.org>, Kukjin Kim <kgene.kim@samsung.com>,
        Tomasz Figa <t.figa@samsung.com>
CC: Vincent Guittot <vincent.guittot@linaro.org>,
        Chirantan Ekbote <chirantan@chromium.org>,
        David Riley <davidriley@chromium.org>, olof@lixom.net,
        linux-samsung-soc@vger.kernel.org, tglx@linutronix.de,
        linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 1/3] clocksource: exynos_mct: Fix ftrace
References: <1401903034-20074-1-git-send-email-dianders@chromium.org>
In-Reply-To: <1401903034-20074-1-git-send-email-dianders@chromium.org>
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Sender: linux-kernel-owner@vger.kernel.org

On 06/04/2014 07:30 PM, Doug Anderson wrote:
> In (93bfb76 clocksource: exynos_mct: register sched_clock callback) we
> supported using the MCT as a scheduler clock.  We properly marked
> exynos4_read_sched_clock() as notrace.  However, we then went and
> called another function that _wasn't_ notrace.  That means if you do:
>
>    cd /sys/kernel/debug/tracing/
>    echo function_graph > current_tracer
>
> You'll get a crash.
>
> Fix this (but still let other readers of the MCT be trace-enabled) by
> adding an extra function.  It's important to keep other users of MCT
> traceable because the MCT is actually quite slow.

Thanks for the explanation in the other email.

I think the last sentence is a bit confusing because you are implicitly 
saying you need these traces to investigate why the timer is slow which 
is referring to something not related to this fix.

> Signed-off-by: Doug Anderson <dianders@chromium.org>
> ---
>   drivers/clocksource/exynos_mct.c | 9 +++++++--
>   1 file changed, 7 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_mct.c
> index 8d64200..ba3a683 100644
> --- a/drivers/clocksource/exynos_mct.c
> +++ b/drivers/clocksource/exynos_mct.c
> @@ -165,7 +165,7 @@ static void exynos4_mct_frc_start(u32 hi, u32 lo)
>   	exynos4_mct_write(reg, EXYNOS4_MCT_G_TCON);
>   }
>
> -static cycle_t exynos4_frc_read(struct clocksource *cs)
> +static inline cycle_t notrace _exynos4_frc_read(void)

Why inline ?

>   {
>   	unsigned int lo, hi;
>   	u32 hi2 = __raw_readl(reg_base + EXYNOS4_MCT_G_CNT_U);
> @@ -179,6 +179,11 @@ static cycle_t exynos4_frc_read(struct clocksource *cs)
>   	return ((cycle_t)hi << 32) | lo;
>   }
>
> +static cycle_t exynos4_frc_read(struct clocksource *cs)
> +{
> +	return _exynos4_frc_read();
> +}
> +
>   static void exynos4_frc_resume(struct clocksource *cs)
>   {
>   	exynos4_mct_frc_start(0, 0);
> @@ -195,7 +200,7 @@ struct clocksource mct_frc = {
>
>   static u64 notrace exynos4_read_sched_clock(void)
>   {
> -	return exynos4_frc_read(&mct_frc);
> +	return _exynos4_frc_read();
>   }
>
>   static void __init exynos4_clocksource_init(void)
>


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