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Date: Wed, 07 Feb 2001 10:00:01 -0800
From: "H. Peter Anvin" <hpa@transmeta.com>
Organization: Transmeta Corporation
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To: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
CC: Petr Vandrovec <vandrove@vc.cvut.cz>, mingo@redhat.com,
        linux-kernel@vger.kernel.org, mikpe@csd.uu.se
Subject: Re: UP APIC reenabling vs. cpu type detection ordering
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"Maciej W. Rozycki" wrote:
> 
> > In other words, I'd like to see a reason for making any vendor-specific
> > determinations, and if so, they should ideally be centralized to the CPU
> > feature-determination code.
> 
>  It would be hard to decide how to classify it.  It's something like "the
> CPU has a local APIC that we know how to handle in the non-MPS system".
> 
>  It might be viable just to delete the test altogether, though and just
> trap #GP(0) on the MSR access.  For the sake of simplicity.  If a problem
> with a system ever arizes, we may handle it then.
> 
>  Note that we still have to choose appropriate vendor-specific PeMo
> handling and an event for the NMI watchdog anyway.
> 

Right... if that is the case then it seems reasonable.

	-hpa

-- 
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