Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755967AbaGHAve (ORCPT ); Mon, 7 Jul 2014 20:51:34 -0400 Received: from mail.linuxfoundation.org ([140.211.169.12]:55564 "EHLO mail.linuxfoundation.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753459AbaGGXyT (ORCPT ); Mon, 7 Jul 2014 19:54:19 -0400 From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Stephen Boyd , Mike Turquette Subject: [PATCH 3.15 112/122] clk: qcom: Fix mmcc-8974s PLL configurations Date: Mon, 7 Jul 2014 16:57:54 -0700 Message-Id: <20140707235737.600331000@linuxfoundation.org> X-Mailer: git-send-email 2.0.0.254.g50f84e3 In-Reply-To: <20140707235734.234226883@linuxfoundation.org> References: <20140707235734.234226883@linuxfoundation.org> User-Agent: quilt/0.63-1 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org 3.15-stable review patch. If anyone has any objections, please let me know. ------------------ From: Stephen Boyd commit 437ae6a1b8f2eedebfbf0f6572e19ca5c58a3f71 upstream. We forgot to add the status bit for the PLLs and we were using the wrong register and masks for configuration, leading to unexpected PLL configurations. Fix this. Fixes: d8b212014e69 (clk: qcom: Add support for MSM8974's multimedia clock controller (MMCC)) Signed-off-by: Stephen Boyd Signed-off-by: Mike Turquette Signed-off-by: Greg Kroah-Hartman --- drivers/clk/qcom/mmcc-msm8974.c | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) --- a/drivers/clk/qcom/mmcc-msm8974.c +++ b/drivers/clk/qcom/mmcc-msm8974.c @@ -169,6 +169,7 @@ static struct clk_pll mmpll0 = { .config_reg = 0x0014, .mode_reg = 0x0000, .status_reg = 0x001c, + .status_bit = 17, .clkr.hw.init = &(struct clk_init_data){ .name = "mmpll0", .parent_names = (const char *[]){ "xo" }, @@ -192,9 +193,10 @@ static struct clk_pll mmpll1 = { .l_reg = 0x0044, .m_reg = 0x0048, .n_reg = 0x004c, - .config_reg = 0x0054, + .config_reg = 0x0050, .mode_reg = 0x0040, .status_reg = 0x005c, + .status_bit = 17, .clkr.hw.init = &(struct clk_init_data){ .name = "mmpll1", .parent_names = (const char *[]){ "xo" }, @@ -218,7 +220,7 @@ static struct clk_pll mmpll2 = { .l_reg = 0x4104, .m_reg = 0x4108, .n_reg = 0x410c, - .config_reg = 0x4114, + .config_reg = 0x4110, .mode_reg = 0x4100, .status_reg = 0x411c, .clkr.hw.init = &(struct clk_init_data){ @@ -233,9 +235,10 @@ static struct clk_pll mmpll3 = { .l_reg = 0x0084, .m_reg = 0x0088, .n_reg = 0x008c, - .config_reg = 0x0094, + .config_reg = 0x0090, .mode_reg = 0x0080, .status_reg = 0x009c, + .status_bit = 17, .clkr.hw.init = &(struct clk_init_data){ .name = "mmpll3", .parent_names = (const char *[]){ "xo" }, @@ -2318,7 +2321,7 @@ static const struct pll_config mmpll1_co .vco_val = 0x0, .vco_mask = 0x3 << 20, .pre_div_val = 0x0, - .pre_div_mask = 0x3 << 12, + .pre_div_mask = 0x7 << 12, .post_div_val = 0x0, .post_div_mask = 0x3 << 8, .mn_ena_mask = BIT(24), @@ -2332,7 +2335,7 @@ static struct pll_config mmpll3_config = .vco_val = 0x0, .vco_mask = 0x3 << 20, .pre_div_val = 0x0, - .pre_div_mask = 0x3 << 12, + .pre_div_mask = 0x7 << 12, .post_div_val = 0x0, .post_div_mask = 0x3 << 8, .mn_ena_mask = BIT(24), -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/