Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752070AbaGJQdc (ORCPT ); Thu, 10 Jul 2014 12:33:32 -0400 Received: from mail-vc0-f181.google.com ([209.85.220.181]:38131 "EHLO mail-vc0-f181.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750778AbaGJQdb convert rfc822-to-8bit (ORCPT ); Thu, 10 Jul 2014 12:33:31 -0400 MIME-Version: 1.0 In-Reply-To: <20140710162419.GK2970@pd.tnic> References: <1404925766-32253-1-git-send-email-hskinnemoen@google.com> <1404925766-32253-4-git-send-email-hskinnemoen@google.com> <3908561D78D1C84285E8C5FCA982C28F32857499@ORSMSX114.amr.corp.intel.com> <20140710162419.GK2970@pd.tnic> Date: Thu, 10 Jul 2014 09:33:30 -0700 Message-ID: Subject: Re: [PATCH 3/6] x86-mce: Clear CMCI enable on all claimed CMCI banks before reboot. From: Tony Luck To: Borislav Petkov Cc: Havard Skinnemoen , "linux-kernel@vger.kernel.org" , Ewout van Bekkum Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Jul 10, 2014 at 9:24 AM, Borislav Petkov wrote: > I'm saying that because I'm assuming BIOS will clear those MSRs upon > warm reset. If it doesn't, then we have a bigger problem. We don't have to trust BIOS to do that. SDM section 15.3.2.5 "IA32_MCi_CTL2 MSRs" says: After processor reset, IA32_MCi_CTL2 MSRs are zero’ed. -Tony -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/