Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757552AbaGWIzF (ORCPT ); Wed, 23 Jul 2014 04:55:05 -0400 Received: from mail-ie0-f169.google.com ([209.85.223.169]:38072 "EHLO mail-ie0-f169.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755177AbaGWIy4 convert rfc822-to-8bit (ORCPT ); Wed, 23 Jul 2014 04:54:56 -0400 MIME-Version: 1.0 X-Originating-IP: [84.73.67.144] In-Reply-To: <53CF765E.7020802@vodafone.de> References: <20140709093124.11354.3774.stgit@patser> <53CE2421.5040906@amd.com> <20140722114607.GL15237@phenom.ffwll.local> <20140722115737.GN15237@phenom.ffwll.local> <53CE56ED.4040109@vodafone.de> <20140722132652.GO15237@phenom.ffwll.local> <53CE6AFA.1060807@vodafone.de> <53CE84AA.9030703@amd.com> <53CE8A57.2000803@vodafone.de> <53CF58FB.8070609@canonical.com> <53CF5B9F.1050800@amd.com> <53CF5EFE.6070307@canonical.com> <53CF63C2.7070407@vodafone.de> <53CF6622.6060803@amd.com> <53CF699D.9070902@canonical.com> <53CF6B18.5070107@vodafone.de> <53CF7035.2060808@amd.com> <53CF7191.2090008@canonical.com> <53CF765E.7020802@vodafone.de> Date: Wed, 23 Jul 2014 10:54:55 +0200 Message-ID: Subject: Re: [Nouveau] [PATCH 09/17] drm/radeon: use common fence implementation for fences From: Daniel Vetter To: =?UTF-8?Q?Christian_K=C3=B6nig?= Cc: Maarten Lankhorst , =?UTF-8?Q?Christian_K=C3=B6nig?= , Thomas Hellstrom , nouveau , LKML , dri-devel , Ben Skeggs , "Deucher, Alexander" Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Jul 23, 2014 at 10:46 AM, Christian König wrote: > Am 23.07.2014 10:42, schrieb Daniel Vetter: > >> On Wed, Jul 23, 2014 at 10:25 AM, Maarten Lankhorst >> wrote: >>> >>> In this case if the sync was to i915 the i915 lockup procedure would take >>> care of itself. It wouldn't fix radeon, but it would at least unblock your >>> intel card again. I haven't specifically added a special case to attempt to >>> unblock external fences, but I've considered it. :-) >> >> Actually the i915 reset stuff relies crucially on being able to kick >> all waiters holding driver locks. Since the current fence code only >> exposes an opaque wait function without exposing the underlying wait >> queue we won't be able to sleep on both the fence queue and the reset >> queue. So would pose a problem if we add fence_wait calls to our >> driver. > > > And apart from that I really think that I misunderstood Maarten. But his > explanation sounds like i915 would do a reset because Radeon is locked up, > right? > > Well if that's really the case then I would question the interface even > more, cause that is really nonsense. I disagree - the entire point of fences is that we can do multi-gpu work asynchronously. So by the time we'll notice that radeon's dead we have accepted the batch from userspace already. The only way to get rid of it again is through our reset machinery, which also tells userspace that we couldn't execute the batch. Whether we actually need to do a hw reset depends upon whether we've committed the batch to the hw already. Atm that's always the case, but the scheduler will change that. So I have no issues with intel doing a reset when other drivers don't signal fences. Also this isn't a problem with the interface really, but with the current implementation for radeon. And getting cross-driver reset notifications right will require more work either way. -Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/