Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757779AbaGWJjP (ORCPT ); Wed, 23 Jul 2014 05:39:15 -0400 Received: from mail-ig0-f169.google.com ([209.85.213.169]:44814 "EHLO mail-ig0-f169.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751347AbaGWJjO convert rfc822-to-8bit (ORCPT ); Wed, 23 Jul 2014 05:39:14 -0400 MIME-Version: 1.0 X-Originating-IP: [84.73.67.144] In-Reply-To: <53CF822E.7050601@amd.com> References: <20140709093124.11354.3774.stgit@patser> <53CE6AFA.1060807@vodafone.de> <53CE84AA.9030703@amd.com> <53CE8A57.2000803@vodafone.de> <53CF58FB.8070609@canonical.com> <53CF5B9F.1050800@amd.com> <53CF5EFE.6070307@canonical.com> <53CF63C2.7070407@vodafone.de> <53CF6622.6060803@amd.com> <53CF699D.9070902@canonical.com> <53CF6B18.5070107@vodafone.de> <53CF7035.2060808@amd.com> <53CF7191.2090008@canonical.com> <53CF765E.7020802@vodafone.de> <53CF8010.9060809@amd.com> <53CF822E.7050601@amd.com> Date: Wed, 23 Jul 2014 11:39:13 +0200 Message-ID: Subject: Re: [Nouveau] [PATCH 09/17] drm/radeon: use common fence implementation for fences From: Daniel Vetter To: =?UTF-8?Q?Christian_K=C3=B6nig?= Cc: =?UTF-8?Q?Christian_K=C3=B6nig?= , Maarten Lankhorst , Thomas Hellstrom , nouveau , LKML , dri-devel , Ben Skeggs , "Deucher, Alexander" Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Jul 23, 2014 at 11:36 AM, Christian König wrote: > Am 23.07.2014 11:30, schrieb Daniel Vetter: > >> On Wed, Jul 23, 2014 at 11:27 AM, Christian König >> wrote: >>> >>> You submit a job to the hardware and then block the job to wait for >>> radeon >>> to be finished? Well than this would indeed require a hardware reset, but >>> wouldn't that make the whole problem even worse? >>> >>> I mean currently we block one userspace process to wait for other >>> hardware >>> to be finished with a buffer, but what you are describing here blocks the >>> whole hardware to wait for other hardware which in the end blocks all >>> userspace process accessing the hardware. >> >> There is nothing new here with prime - if one context hangs the gpu it >> blocks everyone else on i915. >> >>> Talking about alternative approaches wouldn't it be simpler to just >>> offload >>> the waiting to a different kernel or userspace thread? >> >> Well this is exactly what we'll do once we have the scheduler. But >> this is an orthogonal issue imo. > > > Mhm, could have the scheduler first? > > Cause that sounds like reducing the necessary fence interface to just a > fence->wait function. The scheduler needs to keep track of a lot of fences, so I think we'll have to register callbacks, not a simple wait function. We must keep track of all the non-i915 fences for all oustanding batches. Also, the scheduler doesn't eliminate the hw queue, only keep it much slower so that we can sneak in higher priority things. Really, scheduler or not is orthogonal. -Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/