From: Harini Katakam <harini.katakam@xilinx.com>
To: Michal Simek <michals@xilinx.com>,
        =?utf-8?B?QW5kcmVhcyBGw6RyYmVy?= <afaerber@suse.de>,
        "monstr@monstr.eu" <monstr@monstr.eu>,
        Soren Brinkmann <sorenb@xilinx.com>
CC: Michal Simek <michals@xilinx.com>, Andreas Olofsson <andreas@adapteva.com>,
        Matteo Vit <matteo.vit@starwaredesign.com>,
        "Sean Rickerd" <srickerd@suse.com>,
        "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
        "linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        Rob Herring <robh+dt@kernel.org>, Pawel Moll <pawel.moll@arm.com>,
        Mark Rutland <mark.rutland@arm.com>,
        Ian Campbell <ijc+devicetree@hellion.org.uk>,
        Kumar Gala <galak@codeaurora.org>,
        "Russell King" <linux@arm.linux.org.uk>
Subject: RE: [PATCH v2 05/11] ARM: dts: zynq: Add QSPI for Parallella
Thread-Topic: [PATCH v2 05/11] ARM: dts: zynq: Add QSPI for Parallella
Thread-Index: AQHPp95mQbWyYc0A3EeRLyT23ZYPj5uv8viAgAAPhICAAJKZYIAABi6g
Date: Fri, 25 Jul 2014 10:47:31 +0000
References: <1406242820-20140-1-git-send-email-afaerber@suse.de>
 <1406242820-20140-6-git-send-email-afaerber@suse.de>
 <ddb38ce5-9e31-4c94-967c-7784c7fba75c@BN1BFFO11FD028.protection.gbl>
 <53D20E5B.9070501@monstr.eu> <53D21887.2020305@suse.de>
 <53D2258B.9000609@xilinx.com> 
Accept-Language: en-US
Content-Language: en-US
Content-Type: text/plain; charset="utf-8"
MIME-Version: 1.0
Message-ID: <2bb3733f-f6db-4953-b3f2-8d76203d7c91@BY2FFO11FD002.protection.gbl>
Sender: linux-kernel-owner@vger.kernel.org
Content-Transfer-Encoding: 8bit

Hi,

> -----Original Message-----
> From: Harini Katakam
> Sent: Friday, July 25, 2014 4:01 PM
> To: 'Michal Simek'; Andreas Färber; monstr@monstr.eu; Soren Brinkmann
> Cc: Michal Simek; Andreas Olofsson; Matteo Vit; Sean Rickerd;
> devicetree@vger.kernel.org; linux-arm-kernel@lists.infradead.org; linux-
> kernel@vger.kernel.org; Rob Herring; Pawel Moll; Mark Rutland; Ian
> Campbell; Kumar Gala; Russell King
> Subject: RE: [PATCH v2 05/11] ARM: dts: zynq: Add QSPI for Parallella
> 
> Hi,
> 
> > -----Original Message-----
> > From: Michal Simek [mailto:michal.simek@xilinx.com]
> > Sent: Friday, July 25, 2014 3:08 PM
> > To: Andreas Färber; monstr@monstr.eu; Soren Brinkmann
> > Cc: Harini Katakam; Michal Simek; Andreas Olofsson; Matteo Vit; Sean
> > Rickerd; devicetree@vger.kernel.org; linux-arm-
> kernel@lists.infradead.org;
> > linux-kernel@vger.kernel.org; Rob Herring; Pawel Moll; Mark Rutland; Ian
> > Campbell; Kumar Gala; Russell King
> > Subject: Re: [PATCH v2 05/11] ARM: dts: zynq: Add QSPI for Parallella
> >
> > On 07/25/2014 10:42 AM, Andreas Färber wrote:
> > > Am 25.07.2014 09:59, schrieb Michal Simek:
> > >> On 07/25/2014 01:18 AM, Sören Brinkmann wrote:
> > >>> On Fri, 2014-07-25 at 01:00AM +0200, Andreas Färber wrote:
> > >>>> Prepare SPI0 and SPI1 while at it.
> > >
> > >> Patch subject is incorrect. You are adding SPI and QSPI.
> > >
> > > Yes, it originally added only QSPI, but I considered it a good deed to
> > > add SPI as well while already reading that part of the TRM. :)
> > >
> > >>>>
> > >>>> Signed-off-by: Andreas Färber <afaerber@suse.de> --- v2: New
> > >>>>
> > >>>> arch/arm/boot/dts/zynq-7000.dtsi      | 37
> > >>>> +++++++++++++++++++++++++++++++++++
> > >>>> arch/arm/boot/dts/zynq-parallella.dts |  4 ++++ 2 files
> > >>>> changed, 41 insertions(+)
> > >>>>
> > >>>> diff --git a/arch/arm/boot/dts/zynq-7000.dtsi
> > >>>> b/arch/arm/boot/dts/zynq-7000.dtsi index 8fd826a..eed3df0
> > >>>> 100644 --- a/arch/arm/boot/dts/zynq-7000.dtsi +++
> > >>>> b/arch/arm/boot/dts/zynq-7000.dtsi @@ -122,6 +122,30 @@
> > >>>> interrupts = <0 50 4>; };
> > >>>>
> > >>>> +		spi0: spi@e0006000 { +			compatible =
> > "xlnx,zynq-spi-r1p6";
> > >>>> +			reg = <0xe0006000 0x1000>; +
> 	status
> > = "disabled"; +
> > >>>> interrupt-parent = <&intc>; +			interrupts = <0 26 4>;
> > +
> > >>>> clocks = <&clkc 25>, <&clkc 34>; +			clock-names
> =
> > "ref_clk",
> > >>>> "pclk"; +			#address-cells = <1>; +			#size-
> > cells = <0>; +		};
> > >>>> + +		spi1: spi@e0007000 { +			compatible =
> > >>>> "xlnx,zynq-spi-r1p6"; +			reg = <0xe0007000 0x1000>; +
> > 			status
> > >>>> = "disabled"; +			interrupt-parent = <&intc>; +
> > 		interrupts =
> > >>>> <0 49 4>; +			clocks = <&clkc 26>, <&clkc 35>; +
> > 		clock-names
> > >>>> = "ref_clk", "pclk"; +			#address-cells = <1>; +
> > 		#size-cells
> > >>>> = <0>; +		}; +
> > >>> Until here things look good.
> > >>>
> > >>>> gem0: ethernet@e000b000 { compatible = "cdns,gem"; reg =
> > >>>> <0xe000b000 0x4000>; @@ -140,6 +164,19 @@ clock-names = "pclk",
> > >>>> "hclk", "tx_clk"; };
> > >>>>
> > >>>> +		qspi: qspi@e000d000 { +
> 	compatible =
> > >>>> "xlnx,zynq-spi-r1p6"; +			reg = <0xe000d000 0x1000>; +
> > 			status
> > >>>> = "disabled"; +			interrupt-parent = <&intc>; +
> > 		interrupts =
> > >>>> <0 19 4>; +			clocks = <&clkc 10>, <&clkc 43>; +
> > 		clock-names
> > >>>> = "ref_clk", "pclk"; +			num-cs = <1>; +
> > 	#address-cells =
> > >>>> <1>; +			#size-cells = <0>; +		}; +
> > >>> I'm not sure what the status of this driver is. I think QSPI is
> > >>> still under review on the mailing lists and I don't think we
> > >>> should add this yet.
> > >
> > >> Driver for qspi is not in the mainline yet but it doesn't mean that
> > >> this fragment won't work. Harini: Can you please correct me if I am
> > >> wrong?
> > >
> 
> It can be added but it will have to be disabled as there is no qspi driver
> at the moment in mainline.
> 

The cadence spi driver can't be used for qspi directly.
It’s better not to add qspi now. Once qspi driver is in mainline, qspi
can be added with the corresponding compatibility string.

Regards,
Harini
????{.n?+???????+%?????ݶ??w??{.n?+????{??G?????{ay?ʇڙ?,j??f???h?????????z_??(?階?ݢj"???m??????G????????????&???~???iO???z??v?^?m????????????I?