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Date: Sat, 4 Oct 2014 09:27:59 -0700
Message-ID: <CA+55aFxqip0m=Ohd-+VDEkzahhLDe+fj9kXY0bbQY8YMBTEc4A@mail.gmail.com>
Subject: Re: [PATCH 0/3] MIPS executable stack protection
From: Linus Torvalds <torvalds@linux-foundation.org>
To: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Cc: Peter Zijlstra <peterz@infradead.org>,
        linux-mips <linux-mips@linux-mips.org>,
        Zubair Kakakhel <Zubair.Kakakhel@imgtec.com>,
        David Daney <david.daney@cavium.com>,
        Paul Gortmaker <paul.gortmaker@windriver.com>,
        Davidlohr Bueso <davidlohr@hp.com>,
        "Maciej W. Rozycki" <macro@linux-mips.org>,
        "chenhc@lemote.com" <chenhc@lemote.com>,
        =?UTF-8?B?UmFmYcWCIE1pxYJlY2tp?= <zajec5@gmail.com>,
        James Hogan <James.Hogan@imgtec.com>,
        Kees Cook <keescook@chromium.org>,
        "alex@alex-smith.me.uk" <alex@alex-smith.me.uk>,
        Thomas Gleixner <tglx@linutronix.de>,
        John Crispin <blogic@openwrt.org>,
        "jchandra@broadcom.com" <jchandra@broadcom.com>,
        Paul Burton <Paul.Burton@imgtec.com>,
        Qais Yousef <Qais.Yousef@imgtec.com>,
        Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
        Ralf Baechle <ralf@linux-mips.org>,
        Markos Chandras <Markos.Chandras@imgtec.com>,
        Manuel Lauss <manuel.lauss@gmail.com>,
        Andrew Morton <akpm@linux-foundation.org>,
        "lars.persson@axis.com" <lars.persson@axis.com>
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On Sat, Oct 4, 2014 at 9:17 AM, Leonid Yegoshin
<Leonid.Yegoshin@imgtec.com> wrote:
> Linus, it works on CPU with hardware page table walker - MIPS P5600 aka Apache.
>
> I was involved in architecture development of HTW and took care of it.

Ok, as long as it works architecturally, per-thread TLB fills are fine by me.

             Linus
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