Date: Wed, 29 Oct 2014 09:30:36 -0500
From: atull <atull@opensource.altera.com>
To: Steffen Trumtrar <s.trumtrar@pengutronix.de>
CC: Mark Brown <broonie@kernel.org>, <jgunthorpe@obsidianresearch.com>,
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        <linux-doc@vger.kernel.org>, <pavel@denx.de>, <philip@balister.org>,
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Subject: Re: [PATCH v2 2/3] ARM: dts: socfpga: fpga bridges bindings docs
In-Reply-To: <20141029103103.GD10262@pengutronix.de>
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On Wed, 29 Oct 2014, Steffen Trumtrar wrote:

> On Wed, Oct 29, 2014 at 10:16:32AM +0000, Mark Brown wrote:
> > On Wed, Oct 29, 2014 at 08:57:01AM +0100, Steffen Trumtrar wrote:
> > 
> > > So, that shouldn't be a problem though, as I already cooked up a driver for
> > > the L3 with all the ranges specified. The only thing I need to figure out
> > > before I will post it, is how to nicely handle the WO remap register.
> > > I think regmap might be able to handle this itself, but am not sure yet.
> > 
> > It's supposed to be able to, not sure if anyone really tests that or not
> > though so it's possible bugs crept in.  Most write only registers can
> > physically be read so actually come out as volatile rather than write
> > only even if functionally there is no reason to read.
> 
> Ah, I think you might be actually right there. IIRC it IS possible to read
> from that register, but you only get 0s.

Yes, you can read and it will be all 0s.  So read-modify-write is not
something you would want to do for instance.

Alan

> So, I shot myself in the knee with specifying that register as write-only
> in my driver.
> 
> Thanks,
> Steffen
> 
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