Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id ; Sat, 14 Dec 2002 06:56:10 -0500 Received: (majordomo@vger.kernel.org) by vger.kernel.org id ; Sat, 14 Dec 2002 06:56:09 -0500 Received: from 169.imtp.Ilyichevsk.Odessa.UA ([195.66.192.169]:61959 "EHLO Port.imtp.ilyichevsk.odessa.ua") by vger.kernel.org with ESMTP id ; Sat, 14 Dec 2002 06:56:09 -0500 Message-Id: <200212141157.gBEBvFs02981@Port.imtp.ilyichevsk.odessa.ua> Content-Type: text/plain; charset=US-ASCII From: Denis Vlasenko Reply-To: vda@port.imtp.ilyichevsk.odessa.ua To: Pavel Machek Subject: Re: Why does C3 CPU downgrade in kernel 2.4.20? Date: Sat, 14 Dec 2002 16:46:41 +0000 X-Mailer: KMail [version 1.3.2] Cc: Daniel Egger , Dave Jones , Joseph , "linux-kernel@vger.kernel.org" References: <009f01c2a000$f38885d0$3716a8c0@taipei.via.com.tw> <200212110829.gBB8Tja05013@Port.imtp.ilyichevsk.odessa.ua> <20021212180957.GA184@elf.ucw.cz> In-Reply-To: <20021212180957.GA184@elf.ucw.cz> MIME-Version: 1.0 Content-Transfer-Encoding: 7BIT Sender: linux-kernel-owner@vger.kernel.org X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1506 Lines: 44 On 12 December 2002 18:09, Pavel Machek wrote: > Hi! > > > > > I believe someone (Jeff Garzik?) benchmarked gcc code > > > > generation, and the C3 executed code scheduled for a 486 faster > > > > than it did for -m586 > > > > I'm not sure about the alignment flags. I've been meaning to > > > > look into that myself... > > > > > > Interesting. I have no clue about which C3 you're talking about > > > here but a VIA Ezra has all 686 instructions including cmov and > > > thus optimising for PPro works best for me. > > > > > > Prolly I would have to do more benchmarking to find out about > > > aligment advantages. > > > > I heard cmovs are microcoded in Centaurs. > > > > s...l...o...w... > > It still might be faster then a branch... or not if centaurs are > really that simple. > Pavel I did not measure it myself, but rumors were they took tens of cycles. Well, a IFcc prefix meaning 'execute next instruction if' would be way more cool that CMOVcc. Because I want CADDcc, CTESTcc, CBSWAPcc too ;) But since all 1 byte opcodes are taken and Jcc skip # <- 2 byte opcode opcode op1,op2 skip: I think some CPU magic can detect such short jumps and handle'em just like they were such a prefix, saving potential branch (mis-)prediction. -- vda - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/