Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753095AbaKGXMV (ORCPT ); Fri, 7 Nov 2014 18:12:21 -0500 Received: from smtp.codeaurora.org ([198.145.11.231]:47383 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752501AbaKGXMU (ORCPT ); Fri, 7 Nov 2014 18:12:20 -0500 Message-ID: <545D51D1.4050906@codeaurora.org> Date: Fri, 07 Nov 2014 17:12:17 -0600 From: Timur Tabi User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.2.0 MIME-Version: 1.0 To: Grant Likely , "Rafael J. Wysocki" CC: Mika Westerberg , Linus Walleij , Alexandre Courbot , Heikki Krogerus , Mathias Nyman , Ning Li , Alan Cox , lkml Subject: Re: [PATCH v2 0/2] pinctrl: Intel Cherryview/Braswell support References: <1415012493-134561-1-git-send-email-mika.westerberg@linux.intel.com> <545912D2.5090708@codeaurora.org> <1632312.tiWezf5I7W@vostro.rjw.lan> In-Reply-To: Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 11/06/2014 11:37 AM, Grant Likely wrote: > 1) The base assumption must be that firmware sets up the pinctrl > hardware into a usable state at boot and ACPI is used to adjust it as > part of the normal OSPM runtime PM operations on devices. On some SOCs, the GPIO controller and the pin control controller are the same device. So if the Linux driver owns GPIO, we can't have the UEFI runtime talk to the same hardware. -- Qualcomm Innovation Center, Inc. The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project. -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/