Message-ID: <5460E13B.4090302@amd.com>
Date: Mon, 10 Nov 2014 10:00:59 -0600
From: Aravind Gopalakrishnan <aravind.gopalakrishnan@amd.com>
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To: Borislav Petkov <bp@suse.de>
CC: <a.p.zijlstra@chello.nl>, <paulus@samba.org>, <mingo@redhat.com>,
        <acme@kernel.org>, <tglx@linutronix.de>, <hpa@zytor.com>,
        <x86@kernel.org>, <linux-kernel@vger.kernel.org>,
        Paolo Bonzini <pbonzini@redhat.com>,
        "Jan Kiszka" <jan.kiszka@siemens.com>, Len Brown <len.brown@intel.com>,
        Fenghua Yu <fenghua.yu@intel.com>
Subject: Re: [PATCH] perf, amd, ibs: Update IBS MSRs and feature definitions
References: <1415291182-4324-1-git-send-email-Aravind.Gopalakrishnan@amd.com>
 <20141106163430.GB4737@pd.tnic> <545BA884.5040406@amd.com>
 <20141108090355.GB14837@pd.tnic>
In-Reply-To: <20141108090355.GB14837@pd.tnic>
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Sender: linux-kernel-owner@vger.kernel.org

On 11/8/2014 3:03 AM, Borislav Petkov wrote:
> On Thu, Nov 06, 2014 at 10:57:40AM -0600, Aravind Gopalakrishnan wrote:
>> On 11/6/2014 10:34 AM, Borislav Petkov wrote:
>>> On Thu, Nov 06, 2014 at 10:26:22AM -0600, Aravind Gopalakrishnan wrote:
>>>> diff --git a/arch/x86/include/uapi/asm/msr-index.h b/arch/x86/include/uapi/asm/msr-index.h
>>>> index e21331c..ba7b609 100644
>>>> --- a/arch/x86/include/uapi/asm/msr-index.h
>>>> +++ b/arch/x86/include/uapi/asm/msr-index.h
>>>> @@ -206,6 +206,8 @@
>>>>   #define MSR_AMD64_IBSOP_REG_MASK	((1UL<<MSR_AMD64_IBSOP_REG_COUNT)-1)
>>>>   #define MSR_AMD64_IBSCTL		0xc001103a
>>>>   #define MSR_AMD64_IBSBRTARGET		0xc001103b
>>>> +#define MSR_AMD64_IBS_FETCH_EXTD_CTL	0xc001103c
>>>> +#define MSR_AMD64_IBSOPDATA4		0xc001103d
>>>>   #define MSR_AMD64_IBS_REG_COUNT_MAX	8 /* includes MSR_AMD64_IBSBRTARGET */
>>>>   /* Fam 16h MSRs */
>> But Why?
>> IBS_CAPS_BRNTRGT and IBS_CAPS_OPDATA4 indicate support for the respective
>> MSRs
> Ok, I was just making sure.
>
> Btw, MSR_AMD64_IBS_FETCH_EXTD_CTL seems unused. Forgotten?
>

No, There aren't any bits in MSR_AMD64_IBS_FETCH_EXTD_CTL that we need 
to configure right now.
So, have included it here mainly to keep the MSR listing consistent with 
the manual.

Thanks,
-Aravind.
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