Date: Mon, 10 Nov 2014 15:02:15 -0800
From: =?utf-8?B?U8O2cmVu?= Brinkmann <soren.brinkmann@xilinx.com>
To: Peter Crosthwaite <crosthwaitepeter@gmail.com>
CC: <linux-kernel@vger.kernel.org>, <michals@xilinx.com>, <sorenb@xilinx.com>,
        Steve Wang <steven.wang@digilentinc.com>
Subject: Re: [PATCH 1/2] arm: dts: zynq: Move crystal freq. to board level
References: <1415504283-31321-1-git-send-email-crosthwaite.peter@gmail.com>
 <38537ddd8ce845cd9929db4ffcb33031@BN1AFFO11FD006.protection.gbl>
 <CAPokK=p-LXJ0C7_Xy8DR0R0k_YrMRKJSMuh5Z48NWR=wmrQwhg@mail.gmail.com>
MIME-Version: 1.0
Content-Type: text/plain; charset="utf-8"
Content-Disposition: inline
Content-Transfer-Encoding: 8bit
In-Reply-To: <CAPokK=p-LXJ0C7_Xy8DR0R0k_YrMRKJSMuh5Z48NWR=wmrQwhg@mail.gmail.com>
User-Agent: Mutt/1.5.21 (2010-09-15)
Message-ID: <4c9d54e106214449a1602e6a697b822b@BY2FFO11FD018.protection.gbl>
Sender: linux-kernel-owner@vger.kernel.org

On Tue, 2014-11-11 at 08:35AM +1000, Peter Crosthwaite wrote:
> On Mon, Nov 10, 2014 at 7:34 AM, Sören Brinkmann
> <soren.brinkmann@xilinx.com> wrote:
> > On Sun, 2014-11-09 at 01:38PM +1000, Peter Crosthwaite wrote:
> >> The fact that all supported boards use the same 33MHz crystal is a
> >> co-incidence. The Zynq PS support a range of crystal freqs so the
> >> hardcoded setting should be removed from the dtsi. Re-implement it
> >> on the board level.
> >>
> >> This prepares support for Zynq boards with different crystal
> >> frequencies (e.g. the Digilent ZYBO).
> >
> > Even with the 33MHz in the dtsi you can override it on the board-level.
> > Just like the 'status' property is overriden in board dts files.
> >
> 
> Do you want the deletion undone? Even with override capability I think
> it should be removed as the number is board level specific and the
> dtsi should be limited to SoC level information.

I'm fine with it. Just wanted to point out that patch 2 does not
strictly require this change and can stand on its own.

[...]
> >> Im guessing long term this should be converted to a fixed clock. But
> >> I think this at least steps in that direction.
> >
> > I was against that since it makes juggling with clock names more
> > difficult. The problem is that the CCF uses a global name space of clock
> > names.
> 
> I thought it was just a
> 
> clocks = < &phandle >
> 
> Where's the namespacing issue?
> 
> Btw I think the clocks=phandle would be populated the the dts as well.
> So the DTSI would have no clocks = node, and the dts must populate it.
> This allows support for an on-board off-soc clock controller
> controlling the PS clock (which is in theory supported by the SoC).

Every call to clk_register needs to be passed in the clock's parent
(unless it's a root clock). That parent is specified by its name. You
won't see it as user/consumer, but when implementing a clock-provider.
I think there is nothing preventing such a change, but it would make
things more complicated for no good reason. Even if you have an off-chip
clock controller, if that one doesn't provide a fixed clock input to
Zynq, things are likely to break.

	Sören
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/