Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751641AbaKKSn7 (ORCPT ); Tue, 11 Nov 2014 13:43:59 -0500 Received: from mga01.intel.com ([192.55.52.88]:15362 "EHLO mga01.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751307AbaKKSn6 (ORCPT ); Tue, 11 Nov 2014 13:43:58 -0500 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.97,862,1389772800"; d="scan'208";a="414941150" From: Ross Zwisler To: linux-kernel@vger.kernel.org Cc: Ross Zwisler , H Peter Anvin , Ingo Molnar , Thomas Gleixner , David Airlie , dri-devel@lists.freedesktop.org, x86@kernel.org Subject: [PATCH 0/6] add support for new persistent memory instructions Date: Tue, 11 Nov 2014 11:43:10 -0700 Message-Id: <1415731396-19364-1-git-send-email-ross.zwisler@linux.intel.com> X-Mailer: git-send-email 1.9.3 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch set adds support for two new persistent memory instructions, pcommit and clwb. These instructions were announced in the document "Intel Architecture Instruction Set Extensions Programming Reference" with reference number 319433-022. https://software.intel.com/sites/default/files/managed/0d/53/319433-022.pdf These patches apply cleanly to v3.18-rc4. Here are some things of note: - As with the clflushopt patches before this, I'm assuming that the addressing mode generated by the original clflush instruction will match the new clflush instruction with the 0x66 prefix for clflushopt, and for the xsaveopt instruction with the 0x66 prefix for clwb. For all the test cases that I've come up with and for the new clwb code generated by this patch series, this has proven to be true on my test machine. - According to the SDM, xsaveopt has a form where it has a REX.W prefix. I believe that this prefix will not be generated by gcc in x86_64 kernel code. Based on this, I don't believe I need to account for this extra prefix when dealing with the assembly language created for clwb. Please correct me if I'm wrong. - The last three patches in this series update existing uses of clflushopt to use clwb instead. The assertion is that clwb is preferable to clflushopt in these cases because after a clwb the cache line will be clean and ready for eviction, but that there is a possibility that it might be referenced again in the future while it is still in the CPU cache, giving us a performance boost. Cc: H Peter Anvin Cc: Ingo Molnar Cc: Thomas Gleixner Cc: David Airlie Cc: dri-devel@lists.freedesktop.org Cc: x86@kernel.org Ross Zwisler (6): x86: Add support for the pcommit instruction x86/alternative: Add alternative_io_2 x86: Add support for the clwb instruction x86: Use clwb in clflush_cache_range x86: Use clwb in drm_clflush_page x86: Use clwb in drm_clflush_virt_range arch/x86/include/asm/alternative.h | 14 ++++++++++++++ arch/x86/include/asm/cpufeature.h | 2 ++ arch/x86/include/asm/special_insns.h | 16 ++++++++++++++++ arch/x86/mm/pageattr.c | 8 ++++---- drivers/gpu/drm/drm_cache.c | 12 ++++++------ 5 files changed, 42 insertions(+), 10 deletions(-) -- 1.9.3 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/