Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id ; Sat, 21 Dec 2002 06:10:57 -0500 Received: (majordomo@vger.kernel.org) by vger.kernel.org id ; Sat, 21 Dec 2002 06:10:57 -0500 Received: from mx1.elte.hu ([157.181.1.137]:1170 "HELO mx1.elte.hu") by vger.kernel.org with SMTP id ; Sat, 21 Dec 2002 06:10:56 -0500 Date: Sat, 21 Dec 2002 12:24:50 +0100 (CET) From: Ingo Molnar Reply-To: Ingo Molnar To: Linus Torvalds Cc: Brian Gerst , Andi Kleen , , Subject: Re: Intel P6 vs P7 system call performance In-Reply-To: Message-ID: MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII Sender: linux-kernel-owner@vger.kernel.org X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 889 Lines: 23 On Tue, 17 Dec 2002, Linus Torvalds wrote: > > How about this patch? Instead of making a per-cpu trampoline, write to > > the msr during each context switch. > > I wanted to avoid slowing down the context switch, but I didn't actually > time how much the MSR write hurts you (it needs to be conditional, > though, I think). this is the solution i took in the original vsyscall patches. The syscall entry cost is at least one factor more important than the context-switch cost. The MSR write was not all that slow when i measured it (it was on the range of 20 cycles), and it's definitely something the chip makers should keep fast. Ingo - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/