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Date: Tue, 24 Dec 2002 10:51:11 -0800 (PST)
From: Linus Torvalds <torvalds@transmeta.com>
To: Rogier Wolff <R.E.Wolff@BitWizard.nl>
cc: Stephen Rothwell <sfr@canb.auug.org.au>,
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Subject: Re: Intel P6 vs P7 system call performance
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On Tue, 24 Dec 2002, Rogier Wolff wrote:
>
> Ehmm, Linus,
>
> Why do you want to align the return point? Why are jump-targets aligned?
> Because they are faster. But why are they faster? Because the
> cache-line fill is more efficient: the CPU might execute those
> instructions, while it has a smaller chance of hitting  the instructions
> before the target.

Actually, no. Many CPU's apparently also have issues with instruction
decoding etc, where certain alignments (4 or 8-byte aligned) are better
simply because they feed the decode logic more efficiently.

Everything here fits in one cache-line, so clearly the cacheline issues
don't matter.

		Linus

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