Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751414AbaLCC0e (ORCPT ); Tue, 2 Dec 2014 21:26:34 -0500 Received: from mga14.intel.com ([192.55.52.115]:44672 "EHLO mga14.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750927AbaLCC0d (ORCPT ); Tue, 2 Dec 2014 21:26:33 -0500 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.07,505,1413270000"; d="scan'208";a="631751771" From: "Chang, Rebecca Swee Fun" To: "'Linus Walleij'" CC: Linux Kernel Mailing List , "GPIO Subsystem Mailing List" , "Westerberg, Mika" , Denis Turischev , Alexandre Courbot Subject: RE: [PATCHv4 3/3] gpio: sch: Enable IRQ support for Quark X1000 Thread-Topic: [PATCHv4 3/3] gpio: sch: Enable IRQ support for Quark X1000 Thread-Index: AQHQCxP5rTKB8exs7kmvwaSE8Boaypx9KkKQ Date: Wed, 3 Dec 2014 02:26:20 +0000 Message-ID: <50B33AC5ED75F74F991980326F1C438D0FC6DDED@PGSMSX108.gar.corp.intel.com> References: <1416977280-27319-1-git-send-email-rebecca.swee.fun.chang@intel.com> <1416977280-27319-4-git-send-email-rebecca.swee.fun.chang@intel.com> In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [172.30.20.206] Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: 8bit X-MIME-Autoconverted: from base64 to 8bit by nfs id sB32QfaD021997 Hi Linus, Noted, while I continue to work on this IRQ feature, can I resend patch 1 and patch 2 (rebase to devel branch) in v5 thread so that you can pull them in first? Regards, Rebecca > -----Original Message----- > From: Linus Walleij [mailto:linus.walleij@linaro.org] > Sent: 28 November, 2014 10:03 PM > To: Chang, Rebecca Swee Fun > Cc: Linux Kernel Mailing List; GPIO Subsystem Mailing List; Westerberg, Mika; > Denis Turischev; Alexandre Courbot > Subject: Re: [PATCHv4 3/3] gpio: sch: Enable IRQ support for Quark X1000 > > On Wed, Nov 26, 2014 at 5:48 AM, Chang Rebecca Swee Fun > wrote: > > > ntel Quark X1000 GPIO controller supports interrupt handling for both > > core power well and resume power well. This patch is to enable the IRQ > > support and provide IRQ handling for Intel Quark X1000 GPIO-SCH device > > driver. > > > > This piece of work is derived from Dan O'Donovan's initial work for > > Quark X1000 enabling. > > > > Signed-off-by: Chang Rebecca Swee Fun > > > > This is just adding handling of cascading interrupts from a GPIO chip as far as I > can tell. We don't do that with local per-driver hacks anymore if there is no > special reason, we have helpers on gpiolib to handle this. > > Make your Kconfig select GPIOLIB_IRQCHIP and take it from there, look at how > other drivers using GPIOLIB_IRQCHIP are done. Read the documentation for > chained irqchips in Documentation/gpio/driver.txt > > Yours, > Linus Walleij ????{.n?+???????+%?????ݶ??w??{.n?+????{??G?????{ay?ʇڙ?,j??f???h?????????z_??(?階?ݢj"???m??????G????????????&???~???iO???z??v?^?m???? ????????I?