Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757487AbaLIQku (ORCPT ); Tue, 9 Dec 2014 11:40:50 -0500 Received: from mail-bl2on0090.outbound.protection.outlook.com ([65.55.169.90]:48512 "EHLO na01-bl2-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1753182AbaLIQks (ORCPT ); Tue, 9 Dec 2014 11:40:48 -0500 X-Greylist: delayed 1130 seconds by postgrey-1.27 at vger.kernel.org; Tue, 09 Dec 2014 11:40:47 EST Date: Tue, 9 Dec 2014 10:07:42 -0600 From: atull X-X-Sender: atull@linuxheads99 To: One Thousand Gnomes CC: Grant Likely , Pavel Machek , "Greg Kroah-Hartman" , Jason Gunthorpe , "H. Peter Anvin" , "Michal Simek" , Michal Simek , "Randy Dunlap" , Linux Kernel Mailing List , "devicetree@vger.kernel.org" , Pantelis Antoniou , Rob Herring , "Ira Snyder" , "linux-doc@vger.kernel.org" , Mark Brown , , rubini , Steffen Trumtrar , Jason , , Nicolas Pitre , "Balbi, Felipe" , Mauro Carvalho Chehab , David Brown , Rob Landley , David Miller , , "sameo@linux.intel.com" , Andrew Morton , "Linus Walleij" , Alan Tull , , Yves Vandervennet Subject: Re: [PATCH v2 2/3] fpga manager: framework core In-Reply-To: <20141208225519.64501d2d@lxorguk.ukuu.org.uk> Message-ID: References: <1414007405-32186-1-git-send-email-atull@opensource.altera.com> <1414007405-32186-3-git-send-email-atull@opensource.altera.com> <20141024105200.GA20775@amd> <20141208225519.64501d2d@lxorguk.ukuu.org.uk> User-Agent: Alpine 2.02 (DEB 1266 2009-07-14) MIME-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" X-Originating-IP: [64.129.157.38] X-ClientProxiedBy: BLUPR08CA0062.namprd08.prod.outlook.com (10.141.200.42) To CY1PR0301MB1243.namprd03.prod.outlook.com (25.161.212.153) X-Microsoft-Antispam: UriScan:; X-Microsoft-Antispam: BCL:0;PCL:0;RULEID:;SRVR:CY1PR0301MB1243; X-Exchange-Antispam-Report-Test: UriScan:; X-Exchange-Antispam-Report-CFA-Test: BCL:0;PCL:0;RULEID:(602002);SRVR:CY1PR0301MB1243; X-Forefront-PRVS: 0420213CCD X-Forefront-Antispam-Report: SFV:NSPM;SFS:(10009020)(6009001)(189002)(24454002)(51704005)(199003)(377454003)(105586002)(86152002)(53416004)(81156004)(4396001)(33716001)(68736005)(86362001)(92566001)(87976001)(23726002)(40100003)(46102003)(50986999)(19580405001)(76176999)(46406003)(31966008)(54356999)(66066001)(64706001)(122386002)(93886004)(21056001)(69596002)(101416001)(77156002)(50466002)(99396003)(20776003)(110136001)(47776003)(106356001)(97736003)(107046002)(62966003)(120916001)(19580395003)(83506001)(7059030);DIR:OUT;SFP:1101;SCL:1;SRVR:CY1PR0301MB1243;H:linuxheads99.altera.com;FPR:;SPF:None;MLV:sfv;PTR:InfoNoRecords;MX:1;A:0;LANG:en; X-Exchange-Antispam-Report-CFA-Test: BCL:0;PCL:0;RULEID:;SRVR:CY1PR0301MB1243; X-OriginatorOrg: opensource.altera.com Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 8 Dec 2014, One Thousand Gnomes wrote: > On Sat, 6 Dec 2014 13:00:17 +0000 > Grant Likely wrote: > > > On Fri, Oct 24, 2014 at 11:52 AM, Pavel Machek wrote: > > > Hi! > > > > > >> * /sys/class/fpga_manager//firmware > > >> Name of FPGA image file to load using firmware class. > > >> $ echo image.rbf > /sys/class/fpga_manager//firmware > > > > > > I .. still don't think this is good idea. What about namespaces? > > > The path corresponds to path in which namespace? > > > > I don't understand your concern here. This allows userspace to name > > the FPGA bitstream that the kernel will use during request_firmware(), > > and it will show up as the $FIRMWARE value in the uevent file, but it > > is still the responsibility of userspace to choose what to load, and > > it can freely ignore the setting of $FIRMWARE if it needs to. > > I think the entire model here is basically pedicated on a bogus > assumption that an FPGA is a one shot device. It's not. It's a fast > reloadable reusable device. A lot of work being done with FPGAs in > operating systems already involves basically task switching and > scheduling FPGAs as a shared resource pool. Trying to nail something > together with request_firmware is several years behind the curve. > > From userspace it needs to be a open, load, use, close type model, not a > static or semi-static pile of mappings. > > Alan > Hi Alan, I agree with the view that a FPGA is something that can get reprogrammed a lot. That's a flexibility we want to use. I don't see a problem with using firmware to do the programming as long as we have a lightweight interface where we can load an image, use it, then later reset the FGPA and load a different image instead. This assumes that the system will have a pile of FPGA images sitting on the filesystem for us to switch between. My intent is to also support loading using device tree overlays. This is a lot more linux-like and less of something just bolted on. The flow here is: * load a DT overlay * this causes the fpga to get programmed * appropriate bridges get enabled * appropriate drivers get probed When the DT overlay is removed, all these get undone in the reverse order. Alan Tull -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/