Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754525AbaLJIst (ORCPT ); Wed, 10 Dec 2014 03:48:49 -0500 Received: from mail-bn1on0140.outbound.protection.outlook.com ([157.56.110.140]:58272 "EHLO na01-bn1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1753832AbaLJIsd (ORCPT ); Wed, 10 Dec 2014 03:48:33 -0500 X-Greylist: delayed 843 seconds by postgrey-1.27 at vger.kernel.org; Wed, 10 Dec 2014 03:48:32 EST From: Liu Ying To: CC: , , , , , , , , , Subject: [PATCH RFC 07/15] ARM: imx6q: Add GPR3 MIPI muxing control register field shift bits definition Date: Wed, 10 Dec 2014 16:37:20 +0800 Message-ID: <1418200648-32656-8-git-send-email-Ying.Liu@freescale.com> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1418200648-32656-1-git-send-email-Ying.Liu@freescale.com> References: <1418200648-32656-1-git-send-email-Ying.Liu@freescale.com> X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:192.88.168.50;CTRY:US;IPV:NLI;EFV:NLI;SFV:NSPM;SFS:(10019020)(6009001)(199003)(189002)(31966008)(97736003)(104016003)(77156002)(87936001)(62966003)(19580405001)(19580395003)(4396001)(76176999)(110136001)(50226001)(6806004)(107046002)(48376002)(2351001)(99396003)(575784001)(20776003)(36756003)(229853001)(105606002)(50466002)(89996001)(47776003)(50986999)(21056001)(86362001)(68736005)(64706001)(120916001)(92566001)(84676001)(106466001)(46102003)(77096005)(32563001)(217873001);DIR:OUT;SFP:1102;SCL:1;SRVR:BY2PR03MB1015;H:tx30smr01.am.freescale.net;FPR:;MLV:sfv;PTR:InfoDomainNonexistent;A:1;MX:1;LANG:en; MIME-Version: 1.0 Content-Type: text/plain X-Microsoft-Antispam: UriScan:; X-Microsoft-Antispam: BCL:0;PCL:0;RULEID:;SRVR:BY2PR03MB1015; X-Exchange-Antispam-Report-Test: UriScan:; X-Exchange-Antispam-Report-CFA-Test: BCL:0;PCL:0;RULEID:;SRVR:BY2PR03MB1015; X-Forefront-PRVS: 0421BF7135 Authentication-Results: spf=fail (sender IP is 192.88.168.50) smtp.mailfrom=Ying.Liu@freescale.com; X-Exchange-Antispam-Report-CFA-Test: BCL:0;PCL:0;RULEID:;SRVR:BY2PR03MB1015; X-OriginatorOrg: freescale.com Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch adds a macro to define the GPR3 MIPI muxing control register field shift bits. Signed-off-by: Liu Ying --- include/linux/mfd/syscon/imx6q-iomuxc-gpr.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h index ff44374..3b0bed4 100644 --- a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h +++ b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h @@ -207,6 +207,7 @@ #define IMX6Q_GPR3_LVDS0_MUX_CTL_IPU1_DI1 (0x1 << 6) #define IMX6Q_GPR3_LVDS0_MUX_CTL_IPU2_DI0 (0x2 << 6) #define IMX6Q_GPR3_LVDS0_MUX_CTL_IPU2_DI1 (0x3 << 6) +#define IMX6Q_GPR3_MIPI_MUX_CTL_SHIFT 4 #define IMX6Q_GPR3_MIPI_MUX_CTL_MASK (0x3 << 4) #define IMX6Q_GPR3_MIPI_MUX_CTL_IPU1_DI0 (0x0 << 4) #define IMX6Q_GPR3_MIPI_MUX_CTL_IPU1_DI1 (0x1 << 4) -- 2.1.0 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/