Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965277AbbBBWBG (ORCPT ); Mon, 2 Feb 2015 17:01:06 -0500 Received: from v094114.home.net.pl ([79.96.170.134]:55611 "HELO v094114.home.net.pl" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with SMTP id S965219AbbBBWBF (ORCPT ); Mon, 2 Feb 2015 17:01:05 -0500 From: "Rafael J. Wysocki" To: Hanjun Guo Cc: Catalin Marinas , Olof Johansson , Arnd Bergmann , Mark Rutland , Grant Likely , Will Deacon , Lorenzo Pieralisi , Graeme Gregory , Sudeep Holla , Jon Masters , Jason Cooper , Marc Zyngier , Bjorn Helgaas , Daniel Lezcano , Mark Brown , Rob Herring , Robert Richter , Randy Dunlap , Charles.Garcia-Tobin@arm.com, phoenix.liyi@huawei.com, Timur Tabi , Ashwin Chaugule , suravee.suthikulpanit@amd.com, Mark Langsdorf , wangyijing@huawei.com, linux-acpi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linaro-acpi@lists.linaro.org Subject: Re: [PATCH v8 17/21] clocksource / arch_timer: Parse GTDT to initialize arch timer Date: Mon, 02 Feb 2015 23:23:58 +0100 Message-ID: <3447958.XfVzbZ6OCs@vostro.rjw.lan> User-Agent: KMail/4.11.5 (Linux/3.16.0-rc5+; KDE/4.11.5; x86_64; ; ) In-Reply-To: <1422881149-8177-18-git-send-email-hanjun.guo@linaro.org> References: <1422881149-8177-1-git-send-email-hanjun.guo@linaro.org> <1422881149-8177-18-git-send-email-hanjun.guo@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="utf-8" Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 8012 Lines: 243 On Monday, February 02, 2015 08:45:45 PM Hanjun Guo wrote: > Using the information presented by GTDT (Generic Timer Description Table) > to initialize the arch timer (not memory-mapped). > > CC: Daniel Lezcano > Originally-by: Amit Daniel Kachhap > Tested-by: Suravee Suthikulpanit > Tested-by: Yijing Wang > Tested-by: Mark Langsdorf > Tested-by: Jon Masters > Tested-by: Timur Tabi > Signed-off-by: Hanjun Guo > --- > arch/arm64/kernel/time.c | 7 ++ > drivers/clocksource/arm_arch_timer.c | 132 ++++++++++++++++++++++++++++------- An ACK from Thomas Gleixner is necessary for that. > include/linux/clocksource.h | 6 ++ > 3 files changed, 118 insertions(+), 27 deletions(-) > > diff --git a/arch/arm64/kernel/time.c b/arch/arm64/kernel/time.c > index 1a7125c..42f9195 100644 > --- a/arch/arm64/kernel/time.c > +++ b/arch/arm64/kernel/time.c > @@ -35,6 +35,7 @@ > #include > #include > #include > +#include > > #include > > @@ -72,6 +73,12 @@ void __init time_init(void) > > tick_setup_hrtimer_broadcast(); > > + /* > + * Since ACPI or FDT will only one be available in the system, > + * we can use acpi_generic_timer_init() here safely > + */ > + acpi_generic_timer_init(); > + > arch_timer_rate = arch_timer_get_rate(); > if (!arch_timer_rate) > panic("Unable to initialise architected timer.\n"); > diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c > index 095c177..407aa63 100644 > --- a/drivers/clocksource/arm_arch_timer.c > +++ b/drivers/clocksource/arm_arch_timer.c > @@ -21,6 +21,7 @@ > #include > #include > #include > +#include > > #include > #include > @@ -370,8 +371,12 @@ arch_timer_detect_rate(void __iomem *cntbase, struct device_node *np) > if (arch_timer_rate) > return; > > - /* Try to determine the frequency from the device tree or CNTFRQ */ > - if (of_property_read_u32(np, "clock-frequency", &arch_timer_rate)) { > + /* > + * Try to determine the frequency from the device tree or CNTFRQ, > + * if ACPI is enabled, get the frequency from CNTFRQ ONLY. > + */ > + if (!acpi_disabled || > + of_property_read_u32(np, "clock-frequency", &arch_timer_rate)) { > if (cntbase) > arch_timer_rate = readl_relaxed(cntbase + CNTFRQ); > else > @@ -690,28 +695,8 @@ static void __init arch_timer_common_init(void) > arch_timer_arch_init(); > } > > -static void __init arch_timer_init(struct device_node *np) > +static void __init arch_timer_init(void) > { > - int i; > - > - if (arch_timers_present & ARCH_CP15_TIMER) { > - pr_warn("arch_timer: multiple nodes in dt, skipping\n"); > - return; > - } > - > - arch_timers_present |= ARCH_CP15_TIMER; > - for (i = PHYS_SECURE_PPI; i < MAX_TIMER_PPI; i++) > - arch_timer_ppi[i] = irq_of_parse_and_map(np, i); > - arch_timer_detect_rate(NULL, np); > - > - /* > - * If we cannot rely on firmware initializing the timer registers then > - * we should use the physical timers instead. > - */ > - if (IS_ENABLED(CONFIG_ARM) && > - of_property_read_bool(np, "arm,cpu-registers-not-fw-configured")) > - arch_timer_use_virtual = false; > - > /* > * If HYP mode is available, we know that the physical timer > * has been configured to be accessible from PL1. Use it, so > @@ -730,13 +715,39 @@ static void __init arch_timer_init(struct device_node *np) > } > } > > - arch_timer_c3stop = !of_property_read_bool(np, "always-on"); > - > arch_timer_register(); > arch_timer_common_init(); > } > -CLOCKSOURCE_OF_DECLARE(armv7_arch_timer, "arm,armv7-timer", arch_timer_init); > -CLOCKSOURCE_OF_DECLARE(armv8_arch_timer, "arm,armv8-timer", arch_timer_init); > + > +static void __init arch_timer_of_init(struct device_node *np) > +{ > + int i; > + > + if (arch_timers_present & ARCH_CP15_TIMER) { > + pr_warn("arch_timer: multiple nodes in dt, skipping\n"); > + return; > + } > + > + arch_timers_present |= ARCH_CP15_TIMER; > + for (i = PHYS_SECURE_PPI; i < MAX_TIMER_PPI; i++) > + arch_timer_ppi[i] = irq_of_parse_and_map(np, i); > + > + arch_timer_detect_rate(NULL, np); > + > + arch_timer_c3stop = !of_property_read_bool(np, "always-on"); > + > + /* > + * If we cannot rely on firmware initializing the timer registers then > + * we should use the physical timers instead. > + */ > + if (IS_ENABLED(CONFIG_ARM) && > + of_property_read_bool(np, "arm,cpu-registers-not-fw-configured")) > + arch_timer_use_virtual = false; > + > + arch_timer_init(); > +} > +CLOCKSOURCE_OF_DECLARE(armv7_arch_timer, "arm,armv7-timer", arch_timer_of_init); > +CLOCKSOURCE_OF_DECLARE(armv8_arch_timer, "arm,armv8-timer", arch_timer_of_init); > > static void __init arch_timer_mem_init(struct device_node *np) > { > @@ -803,3 +814,70 @@ static void __init arch_timer_mem_init(struct device_node *np) > } > CLOCKSOURCE_OF_DECLARE(armv7_arch_timer_mem, "arm,armv7-timer-mem", > arch_timer_mem_init); > + > +#ifdef CONFIG_ACPI > +static int __init map_generic_timer_interrupt(u32 interrupt, u32 flags) > +{ > + int trigger, polarity; > + > + if (!interrupt) > + return 0; > + > + trigger = (flags & ACPI_GTDT_INTERRUPT_MODE) ? ACPI_EDGE_SENSITIVE > + : ACPI_LEVEL_SENSITIVE; > + > + polarity = (flags & ACPI_GTDT_INTERRUPT_POLARITY) ? ACPI_ACTIVE_LOW > + : ACPI_ACTIVE_HIGH; > + > + return acpi_register_gsi(NULL, interrupt, trigger, polarity); > +} > + > +/* Initialize per-processor generic timer */ > +static int __init arch_timer_acpi_init(struct acpi_table_header *table) > +{ > + struct acpi_table_gtdt *gtdt; > + > + if (arch_timers_present & ARCH_CP15_TIMER) { > + pr_warn("arch_timer: already initialized, skipping\n"); > + return -EINVAL; > + } > + > + gtdt = container_of(table, struct acpi_table_gtdt, header); > + > + arch_timers_present |= ARCH_CP15_TIMER; > + > + arch_timer_ppi[PHYS_SECURE_PPI] = > + map_generic_timer_interrupt(gtdt->secure_el1_interrupt, > + gtdt->secure_el1_flags); > + > + arch_timer_ppi[PHYS_NONSECURE_PPI] = > + map_generic_timer_interrupt(gtdt->non_secure_el1_interrupt, > + gtdt->non_secure_el1_flags); > + > + arch_timer_ppi[VIRT_PPI] = > + map_generic_timer_interrupt(gtdt->virtual_timer_interrupt, > + gtdt->virtual_timer_flags); > + > + arch_timer_ppi[HYP_PPI] = > + map_generic_timer_interrupt(gtdt->non_secure_el2_interrupt, > + gtdt->non_secure_el2_flags); > + > + /* Get the frequency from CNTFRQ */ > + arch_timer_detect_rate(NULL, NULL); > + > + /* Always-on capability */ > + arch_timer_c3stop = !(gtdt->non_secure_el1_flags & ACPI_GTDT_ALWAYS_ON); > + > + arch_timer_init(); > + return 0; > +} > + > +/* Initialize all the generic timers presented in GTDT */ > +void __init acpi_generic_timer_init(void) > +{ > + if (acpi_disabled) > + return; > + > + acpi_table_parse(ACPI_SIG_GTDT, arch_timer_acpi_init); > +} > +#endif > diff --git a/include/linux/clocksource.h b/include/linux/clocksource.h > index abcafaa..af6155a 100644 > --- a/include/linux/clocksource.h > +++ b/include/linux/clocksource.h > @@ -346,4 +346,10 @@ extern void clocksource_of_init(void); > static inline void clocksource_of_init(void) {} > #endif > > +#ifdef CONFIG_ACPI > +void acpi_generic_timer_init(void); > +#else > +static inline void acpi_generic_timer_init(void) { } > +#endif > + > #endif /* _LINUX_CLOCKSOURCE_H */ > -- I speak only for myself. Rafael J. Wysocki, Intel Open Source Technology Center. -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/