From: Andrzej Hajda <a.hajda@samsung.com>
To: linux-samsung-soc@vger.kernel.org
Cc: Andrzej Hajda <a.hajda@samsung.com>,
        Marek Szyprowski <m.szyprowski@samsung.com>,
        Kyungmin Park <kyungmin.park@samsung.com>,
        Kukjin Kim <kgene@kernel.org>, javier.martinez@collabora.co.uk,
        Liquid.Acid@gmx.net, devicetree@vger.kernel.org,
        linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org
Subject: [RFC PATCH 0/3] Fix power domains handling on exynos542x
Date: Thu, 05 Feb 2015 13:35:36 +0100
Message-id: <1423139739-19881-1-git-send-email-a.hajda@samsung.com>
Sender: linux-kernel-owner@vger.kernel.org
Content-Length: 1438
Lines: 41

Hi,

Exynos chipsets since 542x have asynchronous bridges connecting different IPs.
These bridges should be operational during power domain switching, ie associated
clocks cannot be gated.
This patchset adds binding to provide such clocks per power domain and adds code
which enables them during domain on/off operation.

This patchset fixes power domain issues with disp1 domain and HDMI (some of them)
on Odroid XU3:
- disp1 power domain can be turned off,
- no more "imprecise external abort" faults.

The patchset is based on '[PATCH v5 0/9] Enable HDMI support on Exynos platforms' [1].

It was successfully tested on OdroidXU3.

[1]: http://permalink.gmane.org/gmane.linux.kernel.samsung-soc/42743

Regards
Andrzej


Andrzej Hajda (3):
  arm/exynos: add asynchronous bridge clock bindings
  arm/exynos/pm_domains: add support for async-bridge clocks
  ARM: dts: exynos5420: add async-bridge clock to disp1 power domain

 .../bindings/arm/exynos/power_domain.txt           |  3 +++
 arch/arm/boot/dts/exynos5420.dtsi                  |  6 +++--
 arch/arm/mach-exynos/pm_domains.c                  | 27 ++++++++++++++++++----
 3 files changed, 30 insertions(+), 6 deletions(-)

-- 
1.9.1

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