Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932335AbbBID07 (ORCPT ); Sun, 8 Feb 2015 22:26:59 -0500 Received: from mail-ig0-f195.google.com ([209.85.213.195]:58150 "EHLO mail-ig0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932266AbbBID04 (ORCPT ); Sun, 8 Feb 2015 22:26:56 -0500 MIME-Version: 1.0 In-Reply-To: <54D4843E.7060201@arm.com> References: <1423128277-10297-1-git-send-email-bintian.wang@huawei.com> <1423128277-10297-4-git-send-email-bintian.wang@huawei.com> <20150205193017.GF20735@leverpostej> <54D4843E.7060201@arm.com> Date: Mon, 9 Feb 2015 11:26:55 +0800 Message-ID: Subject: Re: [PATCH 3/3] arm64: dts: Add dts files for Hisilicon Hi6220 SoC From: Brent Wang To: Marc Zyngier Cc: Mark Rutland , "dan.zhao@hisilicon.com" , "btw@mail.itp.ac.cn" , Catalin Marinas , "wangbinghui@hisilicon.com" , Will Deacon , "huxinwei@huawei.com" , "khilman@linaro.org" , "haojian.zhuang@linaro.org" , "yanhaifeng@gmail.com" , "rob.herring@linaro.org" , "mturquette@linaro.org" , "victor.lixin@hisilicon.com" , "xuwei5@hisilicon.com" , "jh80.chung@samsung.com" , "sledge.yanwei@huawei.com" , "kong.kongxinwei@hisilicon.com" , "heyunlei@huawei.com" , "w.f@huawei.com" , "zhangfei.gao@linaro.org" , "z.liuxinliang@huawei.com" , "devicetree@vger.kernel.org" , Bintian Wang , Pawel Moll , "ijc+devicetree@hellion.org.uk" , "puck.chen@hisilicon.com" , "olof@lixom.net" , "robh+dt@kernel.org" , "linux@arm.linux.org.uk" , "zhenwei.wang@hisilicon.com" , "linux-arm-kernel@lists.infradead.org" , "guodong.xu@linaro.org" , "tomeu.vizoso@collabora.com" , "sboyd@codeaurora.org" , "linux-kernel@vger.kernel.org" , "galak@codeaurora.org" , "xuejiancheng@huawei.com" , "xuyiping@hisilicon.com" , "liguozhu@hisilicon.com" Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1970 Lines: 67 Hello Marc, 2015-02-06 17:07 GMT+08:00 Marc Zyngier : > On 06/02/15 08:42, Brent Wang wrote: > > [...] > >>> >>>> + <0x0 0xf6802000 0x0 0x2000>, /* GICC */ >>>> + <0x0 0xf6804000 0x0 0x2000>, /* GICH */ >>>> + <0x0 0xf6806000 0x0 0x2000>; /* GICV */ >>> >>> I guess no-one's bothered to consider 64k pages? >>> >>> Given GICH and GICV, I hope that this platform is booted at EL2? >> Transfer from EL3 to EL1 directly, keep these two just for future use. > > That's a real shame, as it keeps users away from some key aspects of the > ARMv8 architecture. > >>> >>>> + #interrupt-cells = <3>; >>>> + #address-cells = <0>; >>>> + interrupt-controller; > > And if you're keeping GICH/GICV, where is the maintenance interrupt? > >>>> + }; >>>> + >>>> + >>>> + timer { >>>> + compatible = "arm,armv8-timer"; >>>> + interrupt-parent = <&gic>; >>>> + interrupts = <1 13 0xff08>, >>>> + <1 14 0xff08>, >>>> + <1 11 0xff08>, >>>> + <1 10 0xff08>; >>>> + clock-frequency = <1200000>; >>>> + }; >>> >>> NAK. Fix your firmware to configure CNTFRQ, on all CPUs. >> Fix in next version, maybe it will take some time to change firmware. > > While you're at it, make sure CNTVOFF_EL2 is set to zero on all CPUs > before dropping to EL1. This tends to be overlooked. Thank you for reminding me, I will keep that in mind. Thanks, > > Thanks, > > M. > -- > Jazz is not dead. It just smells funny... -- Best Regards, Bintian =========================== Don't be nervous, just be happy! -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/