Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1760384AbbBINfX (ORCPT ); Mon, 9 Feb 2015 08:35:23 -0500 Received: from metis.ext.pengutronix.de ([92.198.50.35]:55334 "EHLO metis.ext.pengutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1759709AbbBINfW (ORCPT ); Mon, 9 Feb 2015 08:35:22 -0500 Message-ID: <1423488914.3716.9.camel@pengutronix.de> Subject: Re: [PATCH 01/13] clk: dts: mediatek: add Mediatek MT8135 clock bindings From: Philipp Zabel To: Sascha Hauer Cc: Matthias Brugger , James Liao , Mike Turquette , YH Chen =?UTF-8?Q?=28=E9=99=B3=E6=98=B1=E8=B1=AA=29?= , linux-kernel@vger.kernel.org, Henry Chen , Rob Herring , kernel@pengutronix.de, Yingjoe Chen =?UTF-8?Q?=28=E9=99=B3=E8=8B=B1=E6=B4=B2=29?= , Eddie Huang , Lee Jones , linux-arm-kernel@lists.infradead.org Date: Mon, 09 Feb 2015 14:35:14 +0100 In-Reply-To: <1423478845-2835-2-git-send-email-s.hauer@pengutronix.de> References: <1423478845-2835-1-git-send-email-s.hauer@pengutronix.de> <1423478845-2835-2-git-send-email-s.hauer@pengutronix.de> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.12.9-1 Mime-Version: 1.0 Content-Transfer-Encoding: 7bit X-SA-Exim-Connect-IP: 2001:67c:670:100:96de:80ff:fec2:9969 X-SA-Exim-Mail-From: p.zabel@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2346 Lines: 59 Am Montag, den 09.02.2015, 11:47 +0100 schrieb Sascha Hauer: > From: James Liao > > Document the device-tree binding of Mediatek MT8135 SoC, including > TOPCKGEN, PLLs, INFRA and PERI clock controller. > > Signed-off-by: James Liao > Signed-off-by: Henry Chen > Signed-off-by: Sascha Hauer > --- > .../bindings/clock/mediatek,mt8135-clock.txt | 44 +++++ > include/dt-bindings/clock/mt8135-clk.h | 190 +++++++++++++++++++++ > 2 files changed, 234 insertions(+) > create mode 100644 Documentation/devicetree/bindings/clock/mediatek,mt8135-clock.txt > create mode 100644 include/dt-bindings/clock/mt8135-clk.h > > diff --git a/Documentation/devicetree/bindings/clock/mediatek,mt8135-clock.txt b/Documentation/devicetree/bindings/clock/mediatek,mt8135-clock.txt > new file mode 100644 > index 0000000..1e3566f > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/mediatek,mt8135-clock.txt > @@ -0,0 +1,44 @@ > +Mediatek MT8135 Clock Controller > + > +This binding uses the common clock binding: > +Documentation/devicetree/bindings/clock/clock-bindings.txt > + > +The Mediatek MT8135 clock controller generates and supplies clock to various > +controllers within Mediatek MT8135 SoC. > + > +Required Properties: > + > +- compatible: should be one of following: > + - "mediatek,mt8135-topckgen" : for topckgen clock controller of MT8135. > + - "mediatek,mt8135-apmixedsys" : for apmixed_sys (PLLs) of MT8135. > + - "mediatek,mt8135-infracfg" : for infra_sys clock controller of MT8135. > + - "mediatek,mt8135-pericfg" : for peri_sys clock controller of MT8135. > + > +- reg: physical base address of the controller and length of memory mapped > + region. > + > +- #clock-cells: should be 1. After patch 3 ("clk: mediatek: Add reset controller support"), there's another required property: - #reset-cells: should be 1. Patch 9 ("ARM: dts: mediatek: Enable clock support for Mediatek MT8135.") already correctly includes these in the dtsi. regards Philipp -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/