Message-ID: <1423606397.1128.20.camel@misato.fc.hp.com>
Subject: Re: [PATCH v2 5/7] x86, mm: Support huge KVA mappings on x86
From: Toshi Kani <toshi.kani@hp.com>
To: Dave Hansen <dave.hansen@intel.com>
Cc: akpm@linux-foundation.org, hpa@zytor.com, tglx@linutronix.de,
        mingo@redhat.com, arnd@arndb.de, linux-mm@kvack.org, x86@kernel.org,
        linux-kernel@vger.kernel.org, Elliott@hp.com
Date: Tue, 10 Feb 2015 15:13:17 -0700
In-Reply-To: <54DA6F38.4050902@intel.com>
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		 <54DA54FA.7010707@intel.com> <1423600952.1128.9.camel@misato.fc.hp.com>
	 <54DA6F38.4050902@intel.com>
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On Tue, 2015-02-10 at 12:51 -0800, Dave Hansen wrote:
> On 02/10/2015 12:42 PM, Toshi Kani wrote:
> > On Tue, 2015-02-10 at 10:59 -0800, Dave Hansen wrote:
> >> On 02/09/2015 02:45 PM, Toshi Kani wrote:
> >>> Implement huge KVA mapping interfaces on x86.  Select
> >>> HAVE_ARCH_HUGE_VMAP when X86_64 or X86_32 with X86_PAE is set.
> >>> Without X86_PAE set, the X86_32 kernel has the 2-level page
> >>> tables and cannot provide the huge KVA mappings.
> >>
> >> Not that it's a big deal, but what's the limitation with the 2-level
> >> page tables on 32-bit?  We have a 4MB large page size available there
> >> and we already use it for the kernel linear mapping.
> > 
> > ioremap() calls arch-neutral ioremap_page_range() to set up I/O mappings
> > with PTEs.  This patch-set enables ioremap_page_range() to set up PUD &
> > PMD mappings.  With 2-level page table, I do not think this PUD/PMD
> > mapping code works unless we add some special code.
> 
> What actually breaks, though?
> 
> Can't you just disable the pud code via ioremap_pud_enabled()?

That's what v1 did, and I found in testing that the PMD mapping code did
not work when PAE was unset.  I think we need special handling similar
to one_md_table_init(), which returns pgd as pmd in case of non-PAE.
ioremap_page_range() does not have such handling and I thought it would
be worth adding it.

Thanks,
-Toshi


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