Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752655AbbBMKBw (ORCPT ); Fri, 13 Feb 2015 05:01:52 -0500 Received: from metis.ext.pengutronix.de ([92.198.50.35]:59485 "EHLO metis.ext.pengutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751806AbbBMKBv (ORCPT ); Fri, 13 Feb 2015 05:01:51 -0500 Date: Fri, 13 Feb 2015 11:00:50 +0100 From: Uwe =?iso-8859-1?Q?Kleine-K=F6nig?= To: Maxime Coquelin Cc: Geert Uytterhoeven , Jonathan Corbet , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Philipp Zabel , Russell King , Daniel Lezcano , Thomas Gleixner , Linus Walleij , Greg Kroah-Hartman , Jiri Slaby , Arnd Bergmann , Andrew Morton , "David S. Miller" , Mauro Carvalho Chehab , Joe Perches , Antti Palosaari , Tejun Heo , Will Deacon , Nikolay Borisov , Rusty Russell , Kees Cook , Michal Marek , "linux-doc@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-gpio@vger.kernel.org" , "linux-serial@vger.kernel.org" , Linux-Arch , "linux-api@vger.kernel.org" Subject: Re: [PATCH 02/14] ARM: ARMv7M: Enlarge vector table to 256 entries Message-ID: <20150213100050.GM10842@pengutronix.de> References: <1423763164-5606-1-git-send-email-mcoquelin.stm32@gmail.com> <1423763164-5606-3-git-send-email-mcoquelin.stm32@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: User-Agent: Mutt/1.5.21 (2010-09-15) X-SA-Exim-Connect-IP: 2001:67c:670:100:1d::c0 X-SA-Exim-Mail-From: ukl@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 3088 Lines: 87 On Fri, Feb 13, 2015 at 09:42:46AM +0100, Maxime Coquelin wrote: > Hi Geert, > > 2015-02-12 21:34 GMT+01:00 Geert Uytterhoeven : > > On Thu, Feb 12, 2015 at 6:45 PM, Maxime Coquelin > > wrote: > >> From Cortex-M4 and M7 reference manuals, the nvic supports up to 240 > >> interrupts. So the number of entries in vectors table is 256. > >> > >> This patch adds the missing entries, and change the alignement, so that > >> vector_table remains naturally aligned. > > > > Shouldn't this depend on ARCH_STM32, or some other M4 or M7 specific > > Kconfig option, to avoid wasting the space on other CPUs? > > Actually, the STM32F429 has 90 interrupts, so it would need 106 > entries in the vector table. > The maximum of supported interrupts is not only for Cortex-M4 and M7, > this is also true for Cortex-M3. > > I see two possibilities: > 1 - We declare the vector table for the maximum supported number of > IRQs, as this patch does. > - Pro: it will be functionnal with all Cortex-M MCUs > - Con: Waste of less than 1KB for memory > 2 - We introduce a config flag that provides the number of interrupts > - Pro: No more memory waste > - Con: Need to declare a per MCU model config flag. I'd vote for 2, something like: config CPUV7M_NUM_IRQ int default 90 if STM32F429 default 38 if EFM32GG default 240 then there is a working default and platforms being short on memory can configure as appropriate. (The only down side is that if we create multi-platfrom images at some time in the future either all or none of the supported platforms must provide a value here.) > Then, regarding the natural alignment, is there a way to ensure it > depending on the value of a config flag? The exact wording in ARMARMv7-M is: The Vector table must be naturally aligned to a power of two whose alignment value is greater than or equal to (Number of Exceptions supported x 4), with a minimum alignment of 128 bytes. > Or we should keep it at the maximum value possible? So we need: .align x with x being max(7, ceil(log((CPUV7M_NUM_IRQ + 16) * 4, 2))). So the alignment needed is between 7 and 10. If the assembler supports an expression here I'd use that. But before adding strange hacks to generate the right value there better go for a static value like: /* The vector table must be naturally aligned */ #if CONFIG_CPUV7M_NUM_IRQ <= 112 .align 9 /* log2((112 + 16) * 4) */ #else .align 10 #endif Further steps would be: CONFIG_CPUV7M_NUM_IRQ <= 48 -> .align 8 CONFIG_CPUV7M_NUM_IRQ <= 16 -> .align 7 Probably it's not worth to add the respective #ifdefs here. Best regards Uwe -- Pengutronix e.K. | Uwe Kleine-K?nig | Industrial Linux Solutions | http://www.pengutronix.de/ | -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/