Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752717AbbBMMwk (ORCPT ); Fri, 13 Feb 2015 07:52:40 -0500 Received: from mail7.hitachi.co.jp ([133.145.228.42]:46840 "EHLO mail7.hitachi.co.jp" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752023AbbBMMwj (ORCPT ); Fri, 13 Feb 2015 07:52:39 -0500 Message-ID: <54DDF38F.6020002@hitachi.com> Date: Fri, 13 Feb 2015 21:52:31 +0900 From: Masami Hiramatsu Organization: Hitachi, Ltd., Japan User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:13.0) Gecko/20120614 Thunderbird/13.0.1 MIME-Version: 1.0 To: Denys Vlasenko Cc: Ingo Molnar , Oleg Nesterov , linux-kernel@vger.kernel.org Subject: Re: [PATCH] x86: x86-opcode-map.txt: explain CALLW discrepancy between Intel and AMD References: <1423768017-31766-1-git-send-email-dvlasenk@redhat.com> In-Reply-To: <1423768017-31766-1-git-send-email-dvlasenk@redhat.com> Content-Type: text/plain; charset=ISO-2022-JP Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2616 Lines: 79 (2015/02/13 4:06), Denys Vlasenko wrote: > In 64-bit mode, AMD and Intel CPUs treat 0x66 prefix before branch > insns differently. For near branches, it affects decode too since > immediate offset's width is different. You'd better add a link to your investigation report :) http://marc.info/?l=linux-kernel&m=139714939728946&w=2 so that anyone can see what actually happens. Thank you, > > Signed-off-by: Denys Vlasenko > CC: Masami Hiramatsu > CC: Ingo Molnar > CC: Oleg Nesterov > CC: linux-kernel@vger.kernel.org > --- > arch/x86/lib/x86-opcode-map.txt | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/arch/x86/lib/x86-opcode-map.txt b/arch/x86/lib/x86-opcode-map.txt > index 1a2be7c..816488c 100644 > --- a/arch/x86/lib/x86-opcode-map.txt > +++ b/arch/x86/lib/x86-opcode-map.txt > @@ -273,6 +273,9 @@ dd: ESC > de: ESC > df: ESC > # 0xe0 - 0xef > +# Note: "forced64" is Intel CPU behavior: they ignore 0x66 prefix > +# in 64-bit mode. AMD CPUs accept 0x66 prefix, it causes RIP truncation > +# to 16 bits. In 32-bit mode, 0x66 is accepted by both Intel and AMD. > e0: LOOPNE/LOOPNZ Jb (f64) > e1: LOOPE/LOOPZ Jb (f64) > e2: LOOP Jb (f64) > @@ -281,6 +284,10 @@ e4: IN AL,Ib > e5: IN eAX,Ib > e6: OUT Ib,AL > e7: OUT Ib,eAX > +# With 0x66 prefix in 64-bit mode, for AMD CPUs immediate offset > +# in "near" jumps and calls is 16-bit. For CALL, > +# push of return address is 16-bit wide, RSP is decremented by 2 > +# but is not truncated to 16 bits, unlike RIP. > e8: CALL Jz (f64) > e9: JMP-near Jz (f64) > ea: JMP-far Ap (i64) > @@ -456,6 +463,7 @@ AVXcode: 1 > 7e: movd/q Ey,Pd | vmovd/q Ey,Vy (66),(v1) | vmovq Vq,Wq (F3),(v1) > 7f: movq Qq,Pq | vmovdqa Wx,Vx (66) | vmovdqu Wx,Vx (F3) > # 0x0f 0x80-0x8f > +# Note: "forced64" is Intel CPU behavior (see comment about CALL insn). > 80: JO Jz (f64) > 81: JNO Jz (f64) > 82: JB/JC/JNAE Jz (f64) > @@ -842,6 +850,7 @@ EndTable > GrpTable: Grp5 > 0: INC Ev > 1: DEC Ev > +# Note: "forced64" is Intel CPU behavior (see comment about CALL insn). > 2: CALLN Ev (f64) > 3: CALLF Ep > 4: JMPN Ev (f64) > -- Masami HIRAMATSU Software Platform Research Dept. Linux Technology Research Center Hitachi, Ltd., Yokohama Research Laboratory E-mail: masami.hiramatsu.pt@hitachi.com -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/