Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753138AbbBMQ0f (ORCPT ); Fri, 13 Feb 2015 11:26:35 -0500 Received: from metis.ext.pengutronix.de ([92.198.50.35]:45470 "EHLO metis.ext.pengutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752328AbbBMQ0e (ORCPT ); Fri, 13 Feb 2015 11:26:34 -0500 Message-ID: <1423844735.4182.52.camel@pengutronix.de> Subject: Re: [PATCH 12/14] ARM: dts: Introduce STM32F429 MCU From: Philipp Zabel To: Maxime Coquelin Cc: Jonathan Corbet , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Russell King , Daniel Lezcano , Thomas Gleixner , Linus Walleij , Greg Kroah-Hartman , Jiri Slaby , Arnd Bergmann , Andrew Morton , "David S. Miller" , Mauro Carvalho Chehab , Joe Perches , Antti Palosaari , Tejun Heo , Will Deacon , Nikolay Borisov , Rusty Russell , Kees Cook , Michal Marek , "linux-doc@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-gpio@vger.kernel.org" , "linux-serial@vger.kernel.org" , Linux-Arch , "linux-api@vger.kernel.org" Date: Fri, 13 Feb 2015 17:25:35 +0100 In-Reply-To: References: <1423763164-5606-1-git-send-email-mcoquelin.stm32@gmail.com> <1423763164-5606-13-git-send-email-mcoquelin.stm32@gmail.com> <1423828078.4182.17.camel@pengutronix.de> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.12.9-1 Mime-Version: 1.0 Content-Transfer-Encoding: 7bit X-SA-Exim-Connect-IP: 2001:67c:670:100:96de:80ff:fec2:9969 X-SA-Exim-Mail-From: p.zabel@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2855 Lines: 80 Hi Maxime, Am Freitag, den 13.02.2015, 16:59 +0100 schrieb Maxime Coquelin: > Hi Philipp, > > 2015-02-13 12:47 GMT+01:00 Philipp Zabel : > > Hi Maxime, > > > > Am Donnerstag, den 12.02.2015, 18:46 +0100 schrieb Maxime Coquelin: > > [...] > >> + soc { > >> + reset_ahb1: reset@40023810 { > >> + #reset-cells = <1>; > >> + compatible = "st,stm32-reset"; > >> + reg = <0x40023810 0x4>; > >> + }; > >> + > >> + reset_ahb2: reset@40023814 { > >> + #reset-cells = <1>; > >> + compatible = "st,stm32-reset"; > >> + reg = <0x40023814 0x4>; > >> + }; > >> + > >> + reset_ahb3: reset@40023818 { > >> + #reset-cells = <1>; > >> + compatible = "st,stm32-reset"; > >> + reg = <0x40023818 0x4>; > >> + }; > >> + > >> + reset_apb1: reset@40023820 { > >> + #reset-cells = <1>; > >> + compatible = "st,stm32-reset"; > >> + reg = <0x40023820 0x4>; > >> + }; > >> + > >> + reset_apb2: reset@40023824 { > >> + #reset-cells = <1>; > >> + compatible = "st,stm32-reset"; > >> + reg = <0x40023824 0x4>; > >> + }; > > > > These are mostly consecutive, single registers. I wonder if these are > > part of the same IP block and thus should be grouped together into the > > same reset controller node? > > What I could to is to have two instances. One for AHB and one for APB domain. > Doing this, I will have one instance per domain, and only consecutive registers. > Is it fine for you? Looking at http://www.st.com/web/en/resource/technical/document/reference_manual/DM00031020.pdf Table 34 (RCC register map and reset values), I'd say there is a single "Reset and Clock Control" device at 0x40023800 - 0x40023884: soc { rcc: rcc@40023800 { #clock-cells = <1>; #reset-cells = <1>; compatible = "st,stm32-rcc"; reg = <0x40023800 0x84>; }; ... If you really want to describe the reset controller parts (offsets +0x10 to +0x24) in a separate node, I won't argue against it too long, although this is a somewhat arbitrary decision. In any case, the whole register at offset +0x1c is reserved, so there is no reason to split the reset controller. It is ok to have unused ranges as is already the case with reserved bits inside the used registers. regards Philipp -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/