Date: Thu, 19 Feb 2015 15:24:01 -0500 (EST)
Message-Id: <20150219.152401.649236797449579465.davem@davemloft.net>
To: vbridger@opensource.altera.com
Cc: netdev@vger.kernel.org, nios2-dev@lists.rocketboards.org,
        linux-kernel@vger.kernel.org, vbridger@altera.com, kailng@altera.com,
        dwesterg@gmail.com
Subject: Re: [PATCH net] net: eth: altera: Change access ports to mdio for
 all xMII applications
From: David Miller <davem@davemloft.net>
In-Reply-To: <1423759653-5023-1-git-send-email-vbridger@opensource.altera.com>
References: <1423759653-5023-1-git-send-email-vbridger@opensource.altera.com>
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From: Vince Bridgers <vbridger@opensource.altera.com>
Date: Thu, 12 Feb 2015 10:47:33 -0600

> Change use of Altera TSE's MDIO access from phy 0 registers to phy 1
> registers. This allows support for GMII, MII, RGMII, and SGMII
> designs where the external PHY is always accesible through
> Altera TSE's MDIO phy 1 registers and Altera's PCS is accessible
> through MDIO phy 0 registers for SGMII applications.
> 
> Signed-off-by: Vince Bridgers <vbridger@opensource.altera.com>
> Tested-by: Kai Lin Ng <kailng@altera.com>
> Tested-by: Dalon Westergreen <dwesterg@gmail.com>

Applied to net-next.
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