Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752311AbbBXBLD (ORCPT ); Mon, 23 Feb 2015 20:11:03 -0500 Received: from eddie.linux-mips.org ([148.251.95.138]:49973 "EHLO cvs.linux-mips.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751812AbbBXBLB (ORCPT ); Mon, 23 Feb 2015 20:11:01 -0500 Date: Tue, 24 Feb 2015 00:56:50 +0000 (GMT) From: "Maciej W. Rozycki" To: Linus Torvalds cc: Rik van Riel , Andy Lutomirski , Borislav Petkov , Ingo Molnar , Oleg Nesterov , X86 ML , "linux-kernel@vger.kernel.org" Subject: Re: [RFC PATCH] x86, fpu: Use eagerfpu by default on all CPUs In-Reply-To: Message-ID: References: <20150221093150.GA27841@gmail.com> <20150221163840.GA32073@pd.tnic> <20150221172914.GB32073@pd.tnic> <54EB99E8.2060500@redhat.com> User-Agent: Alpine 2.11 (LFD 23 2013-08-11) MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1788 Lines: 36 On Mon, 23 Feb 2015, Linus Torvalds wrote: > We have one traditional special case, which actually did something > like Maciej's nightmare scenario: the completely broken "FPU errors > over irq13" IBM PC/AT FPU linkage. > > But since we don't actually support old i386 machines any more, we > don't really need to care. The only way you can get into that > situation is with an external i387. I don't think we need to worry > about it. > > But with the old horrid irq13 error handling, you literally could get > into a situation that you got an error "exception" (irq) from the > previous state, *after* you had already switched to the new one. We > had some code to mitigate the problem, but as mentioned, I don't think > it's an issue any more. Correct, the horrid hack is gone, it was so horrible (though I understand why IBM had to do it with their PC/AT) that back in mid 1990s, some 10 years after the inception of the problem, Intel felt so compelled to make people get the handling of it right as to release a dedicated application note: "AP-578 Software and Hardware Considerations for FPU Exception Handlers for Intel Architecture Processors", Order Number 243291-002. Anyway, my point through this consideration has been about the performance benefit from continuing the execution of an x87 instruction in parallel, perhaps until after a context has been fully switched. Which benefit is lost if a FSAVE/FXSAVE executed eagerly at the context switch stalls waiting for the instruction to complete instead. Maciej -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/