Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752841AbbBXO7J (ORCPT ); Tue, 24 Feb 2015 09:59:09 -0500 Received: from mail-bn1on0086.outbound.protection.outlook.com ([157.56.110.86]:32938 "EHLO na01-bn1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1752592AbbBXO7H (ORCPT ); Tue, 24 Feb 2015 09:59:07 -0500 Date: Tue, 24 Feb 2015 15:58:47 +0100 From: Michal Simek User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.4.0 MIME-Version: 1.0 To: Rob Herring , Michal Simek CC: "linux-arm-kernel@lists.infradead.org" , Catalin Marinas , Will Deacon , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , =?UTF-8?B?U8O2cmVuIEJyaW5rbWFubg==?= , Robert Richter , Mark Brown , Eddie Huang , "linux-kernel@vger.kernel.org" , "devicetree@vger.kernel.org" Subject: Re: [PATCH] ARM64: Add new Xilinx ZynqMP SoC References: <8ac3037c175711dec0adcd0d898be7d9722e0ed0.1424764548.git.michal.simek@xilinx.com> In-Reply-To: Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit X-RCIS-Action: ALLOW X-TM-AS-Product-Ver: IMSS-7.1.0.1224-7.5.0.1018-21354.003 X-TM-AS-User-Approved-Sender: Yes Message-ID: <9bffa4683bd6478993de6bea1d3027af@BN1AFFO11FD048.protection.gbl> X-EOPAttributedMessage: 0 Authentication-Results: spf=pass (sender IP is 62.221.5.235) smtp.mailfrom=michal.simek@xilinx.com; gmail.com; dkim=none (message not signed) header.d=none; X-Forefront-Antispam-Report: CIP:62.221.5.235;CTRY:GB;IPV:NLI;EFV:NLI;SFV:NSPM;SFS:(10009020)(6009001)(438002)(199003)(377454003)(189002)(51704005)(164054003)(24454002)(479174004)(87936001)(108616004)(19580405001)(19580395003)(83506001)(54356999)(50986999)(76176999)(77096005)(92726002)(2950100001)(104016003)(33646002)(86362001)(92566002)(6806004)(65956001)(65806001)(46102003)(106466001)(64706001)(47776003)(50466002)(74316001)(64126003)(23676002)(77156002)(62966003)(65826006)(107986001)(24736002);DIR:OUT;SFP:1101;SCL:1;SRVR:BN1AFFO11HUB008;H:xir-pvapsmtpgw01;FPR:;SPF:Pass;PTR:unknown-62-221-5-235.ipspace.xilinx.com;A:1;MX:1;LANG:en; X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:;SRVR:BN1AFFO11HUB008; X-Exchange-Antispam-Report-Test: UriScan:; X-Exchange-Antispam-Report-CFA-Test: BCL:0;PCL:0;RULEID:(601004);SRVR:BN1AFFO11HUB008;BCL:0;PCL:0;RULEID:;SRVR:BN1AFFO11HUB008; X-Forefront-PRVS: 04976078F0 X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Feb 2015 14:59:04.8747 (UTC) X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c;Ip=[62.221.5.235] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN1AFFO11HUB008 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1274 Lines: 38 On 02/24/2015 03:42 PM, Rob Herring wrote: > On Tue, Feb 24, 2015 at 1:56 AM, Michal Simek wrote: >> Initial version of device tree for Xilinx ZynqMP SoC. >> >> Signed-off-by: Michal Simek >> Acked-by: Sören Brinkmann >> --- > > [...] > >> + gic: interrupt-controller@f9010000 { >> + compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic"; > > gic-400, right? yep > >> + #interrupt-cells = <3>; >> + reg = <0x0 0xf9010000 0x10000>, >> + <0x0 0xf9020000 0x20000>, >> + <0x0 0xf9040000 0x20000>, >> + <0x0 0xf9060000 0x20000>; > > These addresses are wrong if you are doing address swizzling to do 64K > offsets. We don't really have an answer yet as to what is the right > way. See the XGene GIC discussion[1]. Is this better for GICC? <0x0 0xf902f000 0x2000> Thanks, Michal -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/