Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753110AbbBYKpx (ORCPT ); Wed, 25 Feb 2015 05:45:53 -0500 Received: from mail-wi0-f181.google.com ([209.85.212.181]:64716 "EHLO mail-wi0-f181.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753013AbbBYKpt (ORCPT ); Wed, 25 Feb 2015 05:45:49 -0500 Date: Wed, 25 Feb 2015 11:45:45 +0100 From: Ingo Molnar To: Andy Lutomirski Cc: Denys Vlasenko , Oleg Nesterov , Rik van Riel , X86 ML , Linux Kernel Mailing List , Borislav Petkov , Linus Torvalds , Andrew Morton , "H. Peter Anvin" , Thomas Gleixner Subject: Re: [RFC PATCH] x86, fpu: Use eagerfpu by default on all CPUs Message-ID: <20150225104544.GD554@gmail.com> References: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1614 Lines: 46 * Andy Lutomirski wrote: > > I'm a big fan of simplifying things, but. > > > > SIMD registers were growing in x86, and they are going > > to grow again, this time four-fold in Intel MIC: from > > sixteen 256-bit registers to thirty two 512-bit > > registers. > > > > That's 2 kbytes of data. Just moving this data out > > to/from memory will take some time. > > > > And some people talk about 1024-bit registers > > already... > > > > Let's not completely remove lazy FPU saving code just > > yet. Maybe we'll be forced to reinstate it. > > I'd prefer a different partial solution: encourage > everyone to clear the xstate before making syscalls > (using e.g. vzeroall). In fact, maybe user code should > aggressively clear newly-unused xstate. Also, xstate has various compaction features and could grow new ones in the future as well, should the xsave area become overly sparse: see xstate_comp_*[] et al in arch/x86/kernel/xsave.c. This is the better, hardware driven, synchronous alternative to lazy, async register state save/restore, as it gets us similar benefits of not saving/restoring unused space, but avoids any async trap overhead. Also ... with more and wider vector CPU registers context switches between different sets of registers are going to be inevitably more expensive, no matter what. Thanks, Ingo -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/