Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753731AbbBYVFT (ORCPT ); Wed, 25 Feb 2015 16:05:19 -0500 Received: from mail-ig0-f172.google.com ([209.85.213.172]:45951 "EHLO mail-ig0-f172.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753699AbbBYVFO (ORCPT ); Wed, 25 Feb 2015 16:05:14 -0500 MIME-Version: 1.0 In-Reply-To: References: <1423828368-18456-1-git-send-email-addy.ke@rock-chips.com> <1423894668-8886-1-git-send-email-addy.ke@rock-chips.com> <1423894668-8886-2-git-send-email-addy.ke@rock-chips.com> Date: Wed, 25 Feb 2015 13:05:13 -0800 X-Google-Sender-Auth: CljEKhd8OrKW5NCUqwUsJZn5TSY Message-ID: Subject: Re: [PATCH v4 1/3] mmc: dw_mmc: update clock after host reach a stable voltage From: Doug Anderson To: Alim Akhtar Cc: Addy Ke , Jaehoon Chung , Ulf Hansson , Olof Johansson , Andrzej Hajda , =?UTF-8?Q?Heiko_St=C3=BCbner?= , Eddie Cai , lintao , Tao Huang , "linux-kernel@vger.kernel.org" , "linux-mmc@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "open list:ARM/Rockchip SoC..." , Javier Martinez Canillas Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1279 Lines: 31 Alim, On Tue, Feb 24, 2015 at 11:52 PM, Alim Akhtar wrote: >>> This looks a HACK to me. >>> If stabilizing host voltage regulator is the problem, can you try out >>> below patch, and see if this resolve your issue? >> >> Actually, IMHO Alim's patch is more of a hack than Addy's. There's >> already a 10ms delay between "power up" and "power on" in the MMC core >> in mmc_power_up() state. That delay is commented as: >> > Well, my suggestion (adding 5ms in switch_volatge) was based on DW_MMC > databook (V2.41a) section "7.4.1.2 Voltage switch Normal Scenario" > step #7 which says:" After the 5ms timer expires, the host voltage > regulator is stable". So all of that should be handled by the core. Just reading the DW_MMC databook can be confusing because they don't differentiate between what's in the SDMMC spec and what's DW_MMC specific. Check out mmc_set_signal_voltage(), specifically: * During a signal voltage level switch, the clock must be gated * for 5 ms according to the SD spec -Doug -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/