Message-ID: <54EE4F35.7070808@amd.com>
Date: Wed, 25 Feb 2015 16:39:49 -0600
From: Joel Schopp <joel.schopp@amd.com>
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CC: Gleb Natapov <gleb@kernel.org>, Paolo Bonzini <pbonzini@redhat.com>,
        <kvm@vger.kernel.org>, Joerg Roedel <joro@8bytes.org>,
        Borislav Petkov <bp@alien8.de>, <linux-kernel@vger.kernel.org>,
        David Kaplan <david.kaplan@amd.com>
Subject: Re: [PATCH] x86: svm: don't intercept CR0 TS or MP bit write
References: <20150220224445.2875.66846.stgit@joelvmguard2.amd.com>
 <20150223191729.GA2186@potion.brq.redhat.com> <54ECEC2F.1090700@amd.com>
 <20150225202600.GA11660@potion.brq.redhat.com>
In-Reply-To: <20150225202600.GA11660@potion.brq.redhat.com>
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On 02/25/2015 02:26 PM, Radim Krčmář wrote:
> 2015-02-24 15:25-0600, Joel Schopp:
>>>> -		clr_cr_intercept(svm, INTERCEPT_CR0_WRITE);
>>>>  	} else {
>>>>  		set_cr_intercept(svm, INTERCEPT_CR0_READ);
>>> (There is no point in checking fpu_active if cr0s are equal.)
>>>
>>>> -		set_cr_intercept(svm, INTERCEPT_CR0_WRITE);
>>> KVM uses lazy FPU and the state is undefined before the first access.
>>> We set cr0.ts when !svm->vcpu.fpu_active to detect the first access, but
>>> if we allow the guest to clear cr0.ts without exiting, it can access FPU
>>> with undefined state.
>> Thanks for the valuable feedback.  It's apparent I hadn't thought
>> through the interaction with lazy FPU and will need to go back and
>> rethink my approach here.
> I don't think we can gain much without sacrificing some laziness, like:
> when a guest with lazy FPU clears CR0.TS, it is going to use that FPU,
> so we could pre-load FPU in this case and drop the write intercept too;
> guests that unconditionally clear CR0.TS would perform worse though.
>
> It's going to take a lot of time, but two hunks in your patch, that made
> selective intercept benefit from decode assists, look useful even now.
>
> Would you post them separately?
I can re-post those separately.  They are less useful, though probably
still worth doing, on their own because SVM_EXIT_WRITE_CR0 takes
precidence over SVM_EXIT_CR0_SEL_WRITE
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