Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753718AbbDAUiL (ORCPT ); Wed, 1 Apr 2015 16:38:11 -0400 Received: from mail-by2on0123.outbound.protection.outlook.com ([207.46.100.123]:13024 "EHLO na01-by2-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1753604AbbDAUiG (ORCPT ); Wed, 1 Apr 2015 16:38:06 -0400 Authentication-Results: spf=none (sender IP is 165.204.84.222) smtp.mailfrom=amd.com; 8bytes.org; dkim=none (message not signed) header.d=none; X-WSS-ID: 0NM59Y4-08-2EF-02 X-M-MSG: From: Aravind Gopalakrishnan To: , , , , , , CC: , , Aravind Gopalakrishnan Subject: [PATCH] x86, aperture: Check for GART before accessing GART registers Date: Wed, 1 Apr 2015 09:32:08 -0500 Message-ID: <1427898728-3434-1-git-send-email-Aravind.Gopalakrishnan@amd.com> X-Mailer: git-send-email 1.9.1 MIME-Version: 1.0 Content-Type: text/plain X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:165.204.84.222;CTRY:US;IPV:NLI;EFV:NLI;BMV:1;SFV:NSPM;SFS:(10019020)(6009001)(428002)(189002)(199003)(105586002)(87936001)(19580395003)(106466001)(19580405001)(77156002)(62966003)(77096005)(229853001)(101416001)(92566002)(50466002)(86362001)(53416004)(47776003)(46102003)(50226001)(50986999)(36756003)(48376002)(61793002)(2101003);DIR:OUT;SFP:1102;SCL:1;SRVR:CY1PR0201MB0891;H:atltwp02.amd.com;FPR:;SPF:None;MLV:sfv;MX:1;A:1;LANG:en; X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:;SRVR:CY1PR0201MB0891; X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-Test: UriScan:; X-Exchange-Antispam-Report-CFA-Test: BCL:0;PCL:0;RULEID:(601004)(5002010)(5005006);SRVR:CY1PR0201MB0891;BCL:0;PCL:0;RULEID:;SRVR:CY1PR0201MB0891; X-Forefront-PRVS: 053315510E X-OriginatorOrg: amd4.onmicrosoft.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Apr 2015 20:22:56.3623 (UTC) X-MS-Exchange-CrossTenant-Id: fde4dada-be84-483f-92cc-e026cbee8e96 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=fde4dada-be84-483f-92cc-e026cbee8e96;Ip=[165.204.84.222];Helo=[atltwp02.amd.com] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY1PR0201MB0891 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 3050 Lines: 92 GART registers are not present in newer processors (Fam15h, Model 10h and later). So, avoid accesses to GART registers in PCI config space by returning early in early_gart_iommu_check() and gart_iommu_hole_init() if GART is not available. Refactoring the family check used in amd_nb into an inline function so we can use it here as well as in amd_nb.c Tested the patch on Fam10h and Fam15h Model 00h-fh and this code runs fine. On Fam15h Model 60h-6fh and on Fam16h, we bail early as they don't have GART. Signed-off-by: Aravind Gopalakrishnan Reviewed-by: Suravee Suthikulpanit --- arch/x86/include/asm/amd_nb.h | 11 +++++++++++ arch/x86/kernel/amd_nb.c | 4 +--- arch/x86/kernel/aperture_64.c | 4 ++-- 3 files changed, 14 insertions(+), 5 deletions(-) diff --git a/arch/x86/include/asm/amd_nb.h b/arch/x86/include/asm/amd_nb.h index aaac3b2..864c8bd 100644 --- a/arch/x86/include/asm/amd_nb.h +++ b/arch/x86/include/asm/amd_nb.h @@ -98,11 +98,22 @@ static inline u16 amd_get_node_id(struct pci_dev *pdev) return 0; } +static inline bool amd_gart_present(void) +{ + /* GART present only on Fam15h upto model 0fh */ + if (boot_cpu_data.x86 == 0xf || boot_cpu_data.x86 == 0x10 || + (boot_cpu_data.x86 == 0x15 && boot_cpu_data.x86_model < 0x10)) + return true; + + return false; +} + #else #define amd_nb_num(x) 0 #define amd_nb_has_feature(x) false #define node_to_amd_nb(x) NULL +#define amd_gart_present(x) false #endif diff --git a/arch/x86/kernel/amd_nb.c b/arch/x86/kernel/amd_nb.c index 5caed1d..29fa475 100644 --- a/arch/x86/kernel/amd_nb.c +++ b/arch/x86/kernel/amd_nb.c @@ -89,9 +89,7 @@ int amd_cache_northbridges(void) next_northbridge(link, amd_nb_link_ids); } - /* GART present only on Fam15h upto model 0fh */ - if (boot_cpu_data.x86 == 0xf || boot_cpu_data.x86 == 0x10 || - (boot_cpu_data.x86 == 0x15 && boot_cpu_data.x86_model < 0x10)) + if (amd_gart_present()) amd_northbridges.flags |= AMD_NB_GART; /* diff --git a/arch/x86/kernel/aperture_64.c b/arch/x86/kernel/aperture_64.c index 76164e1..1cb170b 100644 --- a/arch/x86/kernel/aperture_64.c +++ b/arch/x86/kernel/aperture_64.c @@ -262,7 +262,7 @@ void __init early_gart_iommu_check(void) u64 aper_base = 0, last_aper_base = 0; int aper_enabled = 0, last_aper_enabled = 0, last_valid = 0; - if (!early_pci_allowed()) + if (!early_pci_allowed() || !amd_gart_present()) return; /* This is mostly duplicate of iommu_hole_init */ @@ -356,7 +356,7 @@ int __init gart_iommu_hole_init(void) int i, node; if (gart_iommu_aperture_disabled || !fix_aperture || - !early_pci_allowed()) + !early_pci_allowed() || !amd_gart_present()) return -ENODEV; pr_info("Checking aperture...\n"); -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/