Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752400AbbDCKLk (ORCPT ); Fri, 3 Apr 2015 06:11:40 -0400 Received: from mail-bn1on0146.outbound.protection.outlook.com ([157.56.110.146]:20736 "EHLO na01-bn1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1752134AbbDCKLj (ORCPT ); Fri, 3 Apr 2015 06:11:39 -0400 Authentication-Results: spf=fail (sender IP is 192.88.168.50) smtp.mailfrom=freescale.com; cmss.chinamobile.com; dkim=none (message not signed) header.d=none; From: Jianwei Wang To: , , , , CC: , , , Jianwei Wang , Alison Wang , Xiubo Li Subject: [PATCH v4 2/4] arm/layerscape/ls1021a: DCU pixel clock control Date: Fri, 3 Apr 2015 17:35:57 +0800 Message-ID: <1428053759-3129-3-git-send-email-b52261@freescale.com> X-Mailer: git-send-email 2.1.0.27.g96db324 In-Reply-To: <1428053759-3129-1-git-send-email-b52261@freescale.com> References: <1428053759-3129-1-git-send-email-b52261@freescale.com> X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:192.88.168.50;CTRY:US;IPV:NLI;EFV:NLI;BMV:1;SFV:NSPM;SFS:(10019020)(6009001)(339900001)(189002)(199003)(19580405001)(33646002)(92566002)(6806004)(229853001)(85426001)(46102003)(36756003)(105606002)(106466001)(50226001)(50986999)(19580395003)(104016003)(76176999)(77156002)(77096005)(62966003)(2201001)(2950100001)(87936001)(47776003)(50466002)(48376002)(2101003)(42262002);DIR:OUT;SFP:1102;SCL:1;SRVR:DM2PR0301MB0880;H:tx30smr01.am.freescale.net;FPR:;SPF:Fail;MLV:sfv;MX:1;A:1;LANG:en; MIME-Version: 1.0 Content-Type: text/plain X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:;SRVR:DM2PR0301MB0880; X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-Test: UriScan:; X-Exchange-Antispam-Report-CFA-Test: BCL:0;PCL:0;RULEID:(601004)(5002010)(5005006);SRVR:DM2PR0301MB0880;BCL:0;PCL:0;RULEID:;SRVR:DM2PR0301MB0880; X-Forefront-PRVS: 05352A48BE X-OriginatorOrg: freescale.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Apr 2015 09:39:33.1312 (UTC) X-MS-Exchange-CrossTenant-Id: 710a03f5-10f6-4d38-9ff4-a80b81da590d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=710a03f5-10f6-4d38-9ff4-a80b81da590d;Ip=[192.88.168.50];Helo=[tx30smr01.am.freescale.net] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM2PR0301MB0880 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2982 Lines: 103 Enable DCU pixel clock when platform devices initinalizing and provide enable and disable pixel clock functions for drm driver Signed-off-by: Alison Wang Signed-off-by: Xiubo Li Signed-off-by: Jianwei Wang --- arch/arm/mach-imx/mach-ls1021a.c | 36 ++++++++++++++++++++++++++++++++++++ include/linux/fsl/dcu.h | 22 ++++++++++++++++++++++ 2 files changed, 58 insertions(+) create mode 100644 include/linux/fsl/dcu.h diff --git a/arch/arm/mach-imx/mach-ls1021a.c b/arch/arm/mach-imx/mach-ls1021a.c index b89c858..4fb346d 100644 --- a/arch/arm/mach-imx/mach-ls1021a.c +++ b/arch/arm/mach-imx/mach-ls1021a.c @@ -8,9 +8,44 @@ */ #include +#include +#include +#include +#include #include "common.h" +void dcu_pixclk_disable(void) +{ + struct regmap *scfg_regmap; + + scfg_regmap = syscon_regmap_lookup_by_compatible("fsl,ls1021a-scfg"); + if (IS_ERR(scfg_regmap)) { + pr_err("No syscfg phandle specified\n"); + return; + } + + regmap_write(scfg_regmap, SCFG_PIXCLKCR, PXCK_DISABLE); +} + +void dcu_pixclk_enable(void) +{ + struct regmap *scfg_regmap; + + scfg_regmap = syscon_regmap_lookup_by_compatible("fsl,ls1021a-scfg"); + if (IS_ERR(scfg_regmap)) { + pr_err("No syscfg phandle specified\n"); + return; + } + + regmap_write(scfg_regmap, SCFG_PIXCLKCR, PXCK_ENABLE); +} + +static void __init ls1021a_init_machine(void) +{ + of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); + dcu_pixclk_enable(); +} static const char * const ls1021a_dt_compat[] __initconst = { "fsl,ls1021a", NULL, @@ -18,5 +53,6 @@ static const char * const ls1021a_dt_compat[] __initconst = { DT_MACHINE_START(LS1021A, "Freescale LS1021A") .smp = smp_ops(ls1021a_smp_ops), + .init_machine = ls1021a_init_machine, .dt_compat = ls1021a_dt_compat, MACHINE_END diff --git a/include/linux/fsl/dcu.h b/include/linux/fsl/dcu.h new file mode 100644 index 0000000..1873057 --- /dev/null +++ b/include/linux/fsl/dcu.h @@ -0,0 +1,22 @@ +/* + * Copyright 2015 Freescale Semiconductor, Inc. + * + * Freescale DCU drm device driver + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef __FSL_DCU_H__ +#define __FSL_DCU_H__ + +#define SCFG_PIXCLKCR 0x28 +#define PXCK_ENABLE BIT(31) +#define PXCK_DISABLE 0 + +void dcu_pixclk_enable(void); +void dcu_pixclk_disable(void); + +#endif /* __FSL_DCU_H__ */ -- 2.1.0.27.g96db324 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/