Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753338AbbDGR7L (ORCPT ); Tue, 7 Apr 2015 13:59:11 -0400 Received: from mail-qc0-f174.google.com ([209.85.216.174]:33122 "EHLO mail-qc0-f174.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751735AbbDGR7G (ORCPT ); Tue, 7 Apr 2015 13:59:06 -0400 MIME-Version: 1.0 In-Reply-To: <20150407112306.GL6023@sirena.org.uk> References: <1428355747-16822-1-git-send-email-abrestic@chromium.org> <1428355747-16822-4-git-send-email-abrestic@chromium.org> <20150407112306.GL6023@sirena.org.uk> Date: Tue, 7 Apr 2015 10:59:05 -0700 X-Google-Sender-Auth: X1aBWGeNmhmv2AE-lLHskZaf-FI Message-ID: Subject: Re: [PATCH 4/5] spi: img-spfi: Setup TRANSACTION register before CONTROL register From: Andrew Bresticker To: Mark Brown Cc: linux-spi@vger.kernel.org, "linux-kernel@vger.kernel.org" , Sifan Naeem Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1605 Lines: 32 On Tue, Apr 7, 2015 at 4:23 AM, Mark Brown wrote: > On Mon, Apr 06, 2015 at 02:29:06PM -0700, Andrew Bresticker wrote: >> From: Sifan Naeem >> >> Setting the transfer length in the TRANSACTION register after the >> CONTROL register is programmed causes intermittent timeout issues in >> SPFI transfers when using the SPI framework to control the CS GPIO >> lines. To avoid this issue, set transfer length before programming >> the CONTROL register. > > This is fine but it appears to be a bug fix and therefore should have > been at the start of the series so it could be applied as such and sent > to Linus. As it is it depends on the refactoring for prepare() which > prevents that, please regenerate against Linus' tree so it can be sent > as a fix. The bug this patch fixes is only exposed once the driver is converted to use CS GPIOs (patch 5/5 in this series), so it's not needed unless that patch is taken. Really the entire series could be considered fixes (with patches 2, 3, and 4 being preparatory work for patch 5) since the switch to using CS GPIOs is to work around the hardware's buggy CS handling. That said, support for the first SoC using this controller (IMG Pistachio) is slated to be merged for 4.1, so I'm not sure that pulling these fixes into 4.0 is totally necessary. Thanks, Andrew -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/