Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756825AbbDJVIn (ORCPT ); Fri, 10 Apr 2015 17:08:43 -0400 Received: from mail-ie0-f170.google.com ([209.85.223.170]:33794 "EHLO mail-ie0-f170.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756439AbbDJVIj convert rfc822-to-8bit (ORCPT ); Fri, 10 Apr 2015 17:08:39 -0400 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8BIT To: Mikko Perttunen , swarren@wwwdotorg.org, thierry.reding@gmail.com, gnurou@gmail.com, pdeschrijver@nvidia.com, rjw@rjwysocki.net, viresh.kumar@linaro.org From: Michael Turquette In-Reply-To: <1425213881-5262-11-git-send-email-mikko.perttunen@kapsi.fi> Cc: pwalmsley@nvidia.com, vinceh@nvidia.com, pgaikwad@nvidia.com, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-arm-kernel@lists.infradead.org, tuomas.tynkkynen@iki.fi, "Mikko Perttunen" References: <1425213881-5262-1-git-send-email-mikko.perttunen@kapsi.fi> <1425213881-5262-11-git-send-email-mikko.perttunen@kapsi.fi> Message-ID: <20150410210832.14369.65901@quantum> User-Agent: alot/0.3.5 Subject: Re: [PATCH v8 10/18] clk: tegra: Initialize PLL_X before CCLK_G to ensure it has a parent Date: Fri, 10 Apr 2015 14:08:32 -0700 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 3432 Lines: 99 Quoting Mikko Perttunen (2015-03-01 04:44:33) > This patch moves the initialization of PLL_X to be slightly before > that of CCLK_G. This ensures that at boot, CCLK_G will immediately > have a parent and the common clock framework can determine its > clock rate correctly. > > Without this patch, calling clk_put on CCLK_G could cause the CCF > to set its rate to zero, hanging the system. Hi Mikko, Patch looks fine to me but I wanted to get more info on the behavior you mentioned above about clk_put. Is there some special circumstance that causes this for you? Why does calling clk_put adjust the rate of your clock? Thanks, Mike > > Signed-off-by: Mikko Perttunen > --- > v8: > - Added > > drivers/clk/tegra/clk-tegra-super-gen4.c | 46 ++++++++++++++++++-------------- > 1 file changed, 26 insertions(+), 20 deletions(-) > > diff --git a/drivers/clk/tegra/clk-tegra-super-gen4.c b/drivers/clk/tegra/clk-tegra-super-gen4.c > index f1f4410..c5ea9ee 100644 > --- a/drivers/clk/tegra/clk-tegra-super-gen4.c > +++ b/drivers/clk/tegra/clk-tegra-super-gen4.c > @@ -104,6 +104,32 @@ void __init tegra_super_clk_gen4_init(void __iomem *clk_base, > struct clk *clk; > struct clk **dt_clk; > > + /* > + * Register PLL_X first so that CCLK_G has a parent at registration > + * time. This ensures that the common clock framework knows CCLK_G's > + * rate. > + */ > + > +#if defined(CONFIG_ARCH_TEGRA_114_SOC) || defined(CONFIG_ARCH_TEGRA_124_SOC) > + /* PLLX */ > + dt_clk = tegra_lookup_dt_id(tegra_clk_pll_x, tegra_clks); > + if (!dt_clk) > + return; > + > + clk = tegra_clk_register_pllxc("pll_x", "pll_ref", clk_base, > + pmc_base, CLK_IGNORE_UNUSED, params, NULL); > + *dt_clk = clk; > + > + /* PLLX_OUT0 */ > + > + dt_clk = tegra_lookup_dt_id(tegra_clk_pll_x_out0, tegra_clks); > + if (!dt_clk) > + return; > + clk = clk_register_fixed_factor(NULL, "pll_x_out0", "pll_x", > + CLK_SET_RATE_PARENT, 1, 2); > + *dt_clk = clk; > +#endif > + > /* CCLKG */ > dt_clk = tegra_lookup_dt_id(tegra_clk_cclk_g, tegra_clks); > if (dt_clk) { > @@ -127,25 +153,5 @@ void __init tegra_super_clk_gen4_init(void __iomem *clk_base, > } > > tegra_sclk_init(clk_base, tegra_clks); > - > -#if defined(CONFIG_ARCH_TEGRA_114_SOC) || defined(CONFIG_ARCH_TEGRA_124_SOC) > - /* PLLX */ > - dt_clk = tegra_lookup_dt_id(tegra_clk_pll_x, tegra_clks); > - if (!dt_clk) > - return; > - > - clk = tegra_clk_register_pllxc("pll_x", "pll_ref", clk_base, > - pmc_base, CLK_IGNORE_UNUSED, params, NULL); > - *dt_clk = clk; > - > - /* PLLX_OUT0 */ > - > - dt_clk = tegra_lookup_dt_id(tegra_clk_pll_x_out0, tegra_clks); > - if (!dt_clk) > - return; > - clk = clk_register_fixed_factor(NULL, "pll_x_out0", "pll_x", > - CLK_SET_RATE_PARENT, 1, 2); > - *dt_clk = clk; > -#endif > } > > -- > 2.3.0 > -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/