Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752335AbbDSLUW (ORCPT ); Sun, 19 Apr 2015 07:20:22 -0400 Received: from smtp1-g21.free.fr ([212.27.42.1]:41473 "EHLO smtp1-g21.free.fr" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751490AbbDSLUT (ORCPT ); Sun, 19 Apr 2015 07:20:19 -0400 Date: Sun, 19 Apr 2015 13:20:07 +0200 From: Alban To: Jonas Gorski Cc: Aban Bedel , MIPS Mailing List , Ralf Baechle , Andrew Bresticker , Qais Yousef , Wolfram Sang , Sergey Ryazanov , "linux-kernel@vger.kernel.org" Subject: Re: [PATCH 4/5] MIPS: ath79: Fix the PCI memory size and offset of window 7 Message-ID: <20150419132007.06e22199@tock> In-Reply-To: References: <1429274178-4337-1-git-send-email-albeu@free.fr> <1429274178-4337-5-git-send-email-albeu@free.fr> X-Mailer: Claws Mail 3.9.3 (GTK+ 2.24.23; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2515 Lines: 69 On Sun, 19 Apr 2015 00:28:39 +0200 Jonas Gorski wrote: > Hi, > > On Fri, Apr 17, 2015 at 2:36 PM, Alban Bedel wrote: > > The define AR71XX_PCI_MEM_SIZE miss one window, there is 7 windows, > > not 6. To make things clearer, and allow simpler code, derive > > AR71XX_PCI_MEM_SIZE from the newly introduced AR71XX_PCI_WIN_COUNT > > and AR71XX_PCI_WIN_SIZE. > > > > The define AR71XX_PCI_WIN7_OFFS also add a typo, fix it. > > I think this will break PCI on ar71xx. > > > > > Signed-off-by: Alban Bedel > > --- > > arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 6 ++++-- > > 1 file changed, 4 insertions(+), 2 deletions(-) > > > > diff --git a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h > > b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h index > > aa3800c..e2669a8 100644 --- > > a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h +++ > > b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h @@ -41,7 +41,9 @@ > > #define AR71XX_RESET_SIZE 0x100 > > > > #define AR71XX_PCI_MEM_BASE 0x10000000 > > -#define AR71XX_PCI_MEM_SIZE 0x07000000 > > +#define AR71XX_PCI_WIN_COUNT 8 > > +#define AR71XX_PCI_WIN_SIZE 0x01000000 > > +#define AR71XX_PCI_MEM_SIZE (AR71XX_PCI_WIN_COUNT * > > AR71XX_PCI_WIN_SIZE) > > > > #define AR71XX_PCI_WIN0_OFFS 0x10000000 > > #define AR71XX_PCI_WIN1_OFFS 0x11000000 > > @@ -50,7 +52,7 @@ > > #define AR71XX_PCI_WIN4_OFFS 0x14000000 > > #define AR71XX_PCI_WIN5_OFFS 0x15000000 > > #define AR71XX_PCI_WIN6_OFFS 0x16000000 > > -#define AR71XX_PCI_WIN7_OFFS 0x07000000 > > +#define AR71XX_PCI_WIN7_OFFS 0x17000000 > > These values are used in exactly one place, for writing into the PCI > address space offset registers. > The 7th PCI window is a special one for accessing the configuration > space registers, which requires to be set to 0x07000000 for that > purpose. So by changing this value you likely break access to these > values. Sorry, I foolishly assumed it was a typo. > > > > #define AR71XX_PCI_CFG_BASE \ > > (AR71XX_PCI_MEM_BASE + AR71XX_PCI_WIN7_OFFS + 0x10000) > > Also this macro would now be wrong, and calculate a wrong address. I see, I'll drop this patch and rework the following one to match the old code. Alban -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/