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Date: Mon, 27 Apr 2015 11:12:05 -0700
Message-ID: <CA+55aFx0Z++eowxUod_NGov88hPne+BJSRc+=NgTsHCqyG00+A@mail.gmail.com>
Subject: Re: [PATCH] x86_64, asm: Work around AMD SYSRET SS descriptor
 attribute issue
From: Linus Torvalds <torvalds@linux-foundation.org>
To: Denys Vlasenko <dvlasenk@redhat.com>
Cc: Borislav Petkov <bp@alien8.de>, Andy Lutomirski <luto@amacapital.net>,
        Andy Lutomirski <luto@kernel.org>, X86 ML <x86@kernel.org>,
        "H. Peter Anvin" <hpa@zytor.com>,
        Denys Vlasenko <vda.linux@googlemail.com>,
        Brian Gerst <brgerst@gmail.com>, Ingo Molnar <mingo@kernel.org>,
        Steven Rostedt <rostedt@goodmis.org>, Oleg Nesterov <oleg@redhat.com>,
        Frederic Weisbecker <fweisbec@gmail.com>,
        Alexei Starovoitov <ast@plumgrid.com>, Will Drewry <wad@chromium.org>,
        Kees Cook <keescook@chromium.org>,
        Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
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On Mon, Apr 27, 2015 at 9:12 AM, Denys Vlasenko <dvlasenk@redhat.com> wrote:
>
> It is smaller, but not by much. It is two instructions smaller.

Ehh. That's _half_.

And on a decoding side, it's the difference between 6 bytes that
decode cleanly and can be decoded in parallel with other things
(assuming the 6-byte nop), and 13 bytes that will need at least 2 nops
(unless you want to do lots of prefixes, which is slow on some cores),
_and_ which is likely big enough that you will basically not be
decoding anythign else that cycle.

So on the whole, your "smaller, but not by much" is all relative. It's
a relatively big difference.

So if one or two cycles in this code doesn't matter, then why are we
adding alternate instructions just to avoid a few ALU instructions and
a conditional branch that predicts perfectly? And if it does matter,
then the 6-byte option looks clearly better..

                         Linus
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