Date: Fri, 1 May 2015 09:18:30 +0200
From: Ingo Molnar <mingo@kernel.org>
To: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com>
Cc: tglx@linutronix.de, mingo@redhat.com, hpa@zytor.com, tony.luck@intel.com,
        bp@alien8.de, jiang.liu@linux.intel.com, yinghai@kernel.org,
        x86@kernel.org, dvlasenk@redhat.com, JBeulich@suse.com,
        slaoub@gmail.com, luto@amacapital.net, dave.hansen@linux.intel.com,
        oleg@redhat.com, rostedt@goodmis.org, rusty@rustcorp.com.au,
        prarit@redhat.com, linux@rasmusvillemoes.dk, jroedel@suse.de,
        andriy.shevchenko@linux.intel.com, macro@linux-mips.org,
        wangnan0@huawei.com, linux-kernel@vger.kernel.org,
        linux-edac@vger.kernel.org
Subject: Re: [PATCH 0/4] Enable deferred error interrupts
Message-ID: <20150501071830.GB19852@gmail.com>
References: <1430405365-4473-1-git-send-email-Aravind.Gopalakrishnan@amd.com>
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* Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com> wrote:

> Newer AMD processors can generate deferred errors and can be configured
> to generate APIC interrupts on such events.

What's the wider context of this? What is it good for?

I suspect it's MCE related, but only from the diffstat:

>  arch/x86/kernel/cpu/mcheck/mce.c         |   1 +
>  arch/x86/kernel/cpu/mcheck/mce_amd.c     | 105 ++++++++++++++++++++++++++++++-

Please provide proper high level description for the changes.

Thanks,

	Ingo
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