Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753987AbbEAOuy (ORCPT ); Fri, 1 May 2015 10:50:54 -0400 Received: from mail-bl2on0134.outbound.protection.outlook.com ([65.55.169.134]:20544 "EHLO na01-bl2-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1753858AbbEAOuw (ORCPT ); Fri, 1 May 2015 10:50:52 -0400 Authentication-Results: spf=none (sender IP is 165.204.84.222) smtp.mailfrom=amd.com; alien8.de; dkim=none (message not signed) header.d=none; X-WSS-ID: 0NNOEKM-08-UX5-02 X-M-MSG: Message-ID: <554392C4.4060209@amd.com> Date: Fri, 1 May 2015 09:50:44 -0500 From: Aravind Gopalakrishnan User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:31.0) Gecko/20100101 Thunderbird/31.6.0 MIME-Version: 1.0 To: Ingo Molnar CC: , , , , , , , , , , , , , , , , , , , , , , , Subject: Re: [PATCH 0/4] Enable deferred error interrupts References: <1430405365-4473-1-git-send-email-Aravind.Gopalakrishnan@amd.com> <20150501071830.GB19852@gmail.com> In-Reply-To: <20150501071830.GB19852@gmail.com> Content-Type: text/plain; charset="windows-1252"; format=flowed Content-Transfer-Encoding: 7bit X-Originating-IP: [10.180.168.240] X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:165.204.84.222;CTRY:US;IPV:NLI;EFV:NLI;SFV:NSPM;SFS:(10019020)(6009001)(428002)(24454002)(377454003)(189002)(164054003)(199003)(51704005)(479174004)(33656002)(46102003)(47776003)(77156002)(86362001)(23746002)(92566002)(77096005)(2950100001)(110136002)(99136001)(36756003)(83506001)(50986999)(19580405001)(65956001)(62966003)(50466002)(105586002)(106466001)(101416001)(59896002)(87936001)(120886001)(80316001)(65816999)(54356999)(76176999)(19580395003)(64126003);DIR:OUT;SFP:1102;SCL:1;SRVR:BN3PR02MB1110;H:atltwp02.amd.com;FPR:;SPF:None;MLV:sfv;MX:1;A:1;LANG:en; X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:;SRVR:BN3PR02MB1110; X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-Test: UriScan:; X-Exchange-Antispam-Report-CFA-Test: BCL:0;PCL:0;RULEID:(601004)(5005006)(3002001);SRVR:BN3PR02MB1110;BCL:0;PCL:0;RULEID:;SRVR:BN3PR02MB1110; X-Forefront-PRVS: 0563F2E8B7 X-OriginatorOrg: amd4.onmicrosoft.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 May 2015 14:50:48.4439 (UTC) X-MS-Exchange-CrossTenant-Id: fde4dada-be84-483f-92cc-e026cbee8e96 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=fde4dada-be84-483f-92cc-e026cbee8e96;Ip=[165.204.84.222];Helo=[atltwp02.amd.com] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN3PR02MB1110 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1134 Lines: 34 On 5/1/2015 2:18 AM, Ingo Molnar wrote: > * Aravind Gopalakrishnan wrote: > >> Newer AMD processors can generate deferred errors and can be configured >> to generate APIC interrupts on such events. > What's the wider context of this? What is it good for? > > I suspect it's MCE related, but only from the diffstat: Deferred errors indicate error conditions that were not corrected, but require no action from S/W (or action is optional). These errors provide info about a latent UC MCE that can occur when a poisoned data is consumed by the processor. HTH, I shall include the short description in the cover letter of V2. Thanks, -Aravind. >> arch/x86/kernel/cpu/mcheck/mce.c | 1 + >> arch/x86/kernel/cpu/mcheck/mce_amd.c | 105 ++++++++++++++++++++++++++++++- > Please provide proper high level description for the changes. > > -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/