From: Marek Vasut <marex@denx.de>
To: Michal Suchanek <hramrach@gmail.com>
Subject: Re: [PATCH 3/3] MTD: spi-nor: add flag to not use sector erase.
Date: Mon, 4 May 2015 14:12:46 +0200
User-Agent: KMail/1.13.7 (Linux/3.14-2-amd64; KDE/4.13.1; x86_64; ; )
Cc: David Woodhouse <dwmw2@infradead.org>,
        Brian Norris <computersforpeace@gmail.com>,
        "Rafa?? Mi??ecki" <zajec5@gmail.com>,
        Alison Chaiken <alison_chaiken@mentor.com>,
        Ben Hutchings <ben@decadent.org.uk>,
        Geert Uytterhoeven <geert+renesas@glider.be>,
        "Bean Huo (beanhuo)" <beanhuo@micron.com>,
        "grmoore@altera.com" <grmoore@altera.com>,
        linux-mtd@lists.infradead.org,
        Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
References: <cover.1430430153.git.hramrach@gmail.com> <201505011620.05512.marex@denx.de> <CAOMqctTL-y+YxnxuBX8r4osgbz3_+xJ2T2AfCj4idxMo3tCo8g@mail.gmail.com>
In-Reply-To: <CAOMqctTL-y+YxnxuBX8r4osgbz3_+xJ2T2AfCj4idxMo3tCo8g@mail.gmail.com>
MIME-Version: 1.0
Content-Type: Text/Plain;
  charset="us-ascii"
Content-Transfer-Encoding: 7bit
Message-Id: <201505041412.46195.marex@denx.de>
Sender: linux-kernel-owner@vger.kernel.org
Content-Length: 1624
Lines: 47

On Monday, May 04, 2015 at 01:11:03 PM, Michal Suchanek wrote:
> Hello,

Hi!

> On 1 May 2015 at 16:20, Marek Vasut <marex@denx.de> wrote:
> > On Friday, May 01, 2015 at 09:05:15 AM, Michal Suchanek wrote:
> >> On 1 May 2015 at 01:13, Marek Vasut <marex@denx.de> wrote:
> >> I can determine it for this particular chip. However, when the vendor
> >> datasheet says the block is 64/32K it might mean that chips with this
> >> ID can have either block size.
> > 
> > http://www.chingistek.com/img/Product_Files/Pm25LD010020datasheet%20v04.p
> > df page 21:
> > 
> > SECTOR_ER (20h) erases 4kByte sector.
> > BLOCK_ER (d8h) erases 64kByte sector.
> > 
> > http://www.gigadevice.com/product/download/366.html?locale=en_US
> > page 27-28:
> > 
> > Sector Erase (SE) (20h) erases 4kByte sector
> > 64KB Block Erase (BE) (d8h) erases 64kByte sector
> 
> It's pretty much the same as the datasheet I used
> http://www.elm-tech.com/en/products/spi-flash-memory/gd25q41/gd25q41.pdf
> 
> It mentions both
> 32KB Block Erase (BE) (52H)
> and
> 64KB Block Erase (BE) (D8H)

The SPI NOR framework will use 0xbe opcode, no problem.

> So the chip probably tries its best to be compatible with any command
> set and this last patch is not needed. The memory organization table
> on page 7 is not all that reassuring, though.

Which exact part do you refer to please ?

Best regards,
Marek Vasut
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/