Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752195AbbEDQkW (ORCPT ); Mon, 4 May 2015 12:40:22 -0400 Received: from hqemgate14.nvidia.com ([216.228.121.143]:17482 "EHLO hqemgate14.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751723AbbEDQjU (ORCPT ); Mon, 4 May 2015 12:39:20 -0400 X-PGP-Universal: processed; by hqnvupgp08.nvidia.com on Mon, 04 May 2015 09:37:28 -0700 From: Rhyland Klein To: Peter De Schrijver CC: Mike Turquette , Stephen Warren , Stephen Boyd , Thierry Reding , Alexandre Courbot , linux-clk@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org, Rhyland Klein Subject: [PATCH v4 17/20] clk: tegra: pll: Fix _pll_ramp_calc_pll logic and _calc_dynamic_ramp_rate Date: Mon, 4 May 2015 12:37:37 -0400 Message-ID: <1430757460-9478-18-git-send-email-rklein@nvidia.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1430757460-9478-1-git-send-email-rklein@nvidia.com> References: <1430757460-9478-1-git-send-email-rklein@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1884 Lines: 58 This removes the conversion from pdiv to hw, which is already taken care of by _get_table_rate before this code is run. This avoids incorrectly converting pdiv to hw twice and getting the wrong hw value. Also set the input_rate in the freq cfg in _calc_dynamic_ramp_rate while setting all the other fields. Signed-off-by: Rhyland Klein --- v2: - Added fix for _calc_dynamic_ramp_rate where input_rate wasn't ever populated in the cfg, which could cause problems later if/when accessed. drivers/clk/tegra/clk-pll.c | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/drivers/clk/tegra/clk-pll.c b/drivers/clk/tegra/clk-pll.c index 778f2de0045e..a8d5399bff1b 100644 --- a/drivers/clk/tegra/clk-pll.c +++ b/drivers/clk/tegra/clk-pll.c @@ -1018,6 +1018,7 @@ static int _calc_dynamic_ramp_rate(struct clk_hw *hw, cfg->m = _pll_fixed_mdiv(pll->params, parent_rate); cfg->output_rate = rate * p; cfg->n = cfg->output_rate * cfg->m / parent_rate; + cfg->input_rate = parent_rate; p_div = _p_div_to_hw(hw, p); if (p_div < 0) @@ -1036,7 +1037,7 @@ static int _pll_ramp_calc_pll(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) { struct tegra_clk_pll *pll = to_clk_pll(hw); - int err = 0, p_div; + int err = 0; err = _get_table_rate(hw, cfg, rate, parent_rate); if (err < 0) @@ -1047,11 +1048,6 @@ static int _pll_ramp_calc_pll(struct clk_hw *hw, err = -EINVAL; goto out; } - p_div = _p_div_to_hw(hw, cfg->p); - if (p_div < 0) - return p_div; - else - cfg->p = p_div; } if (cfg->p > pll->params->max_p) -- 1.7.9.5 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/