Message-ID: <554910D1.1030706@xilinx.com>
Date: Tue, 5 May 2015 20:49:53 +0200
From: Michal Simek <michal.simek@xilinx.com>
User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.6.0
MIME-Version: 1.0
To: Joe Perches <joe@perches.com>, Michal Simek <michal.simek@xilinx.com>
CC: <netdev@vger.kernel.org>, Peter Crosthwaite <peter.crosthwaite@xilinx.com>,
        =?windows-1252?Q?S=F6ren_Brinkmann?= <soren.brinkmann@xilinx.com>,
        <monstr@monstr.eu>, John Linn <John.Linn@xilinx.com>,
        Anirudha Sarangi <anirudh@xilinx.com>, <linux-kernel@vger.kernel.org>,
        <linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH 02/12] net: axienet: Handle 0 packet receive gracefully
References: <7fb84f65a61bbe0fdb4b61a871cf4d4f7910955d.1430817941.git.michal.simek@xilinx.com>
	 <55b3c89b3549c61d62b8440636516fd572870842.1430817941.git.michal.simek@xilinx.com>
 <1430834264.7191.9.camel@perches.com>
In-Reply-To: <1430834264.7191.9.camel@perches.com>
Content-Type: text/plain; charset="windows-1252"
Content-Transfer-Encoding: 7bit
X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 May 2015 18:50:10.6247
 (UTC)
X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c
X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c;Ip=[149.199.60.100];Helo=[xsj-pvapsmtpgw02]
X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem
X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN1AFFO11HUB033
Sender: linux-kernel-owner@vger.kernel.org
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org
Content-Length: 1678
Lines: 39

On 05/05/2015 03:57 PM, Joe Perches wrote:
> On Tue, 2015-05-05 at 11:25 +0200, Michal Simek wrote:
>> From: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
>>
>> The AXI-DMA rx-delay interrupt can sometimes be triggered
>> when there are 0 outstanding packets received. This is due
>> to the fact that the receive function will greedily consume
>> as many packets as possible on interrupt. So if two packets
>> (with a very particular timing) arrive in succession they
>> will each cause the rx-delay interrupt, but the first interrupt
>> will consume both packets.
>> This means the second interrupt is a 0 packet receive.
>>
>> This is mostly OK, except that the tail pointer register is
>> updated unconditionally on receive. Currently the tail pointer
>> is always set to the current bd-ring descriptor under
>> the assumption that the hardware has moved onto the next
>> descriptor. What this means for length 0 recv is the current
>> descriptor that the hardware is potentially yet to use will
>> be marked as the tail. This causes the hardware to think
>> its run out of descriptors deadlocking the whole rx path.
>>
>> Fixed by updating the tail pointer to the most recent
>> successfully consumed descriptor.
> 
> I think some of this would be good to have as comments
> in the code instead of just in the changelog.


Is it really needed? If yes, no problem to add it but git blame can
point you to that.

Thanks,
Michal
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/