From: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com>
To: <tglx@linutronix.de>, <mingo@redhat.com>, <hpa@zytor.com>,
        <tony.luck@intel.com>, <bp@alien8.de>, <jiang.liu@linux.intel.com>,
        <yinghai@kernel.org>
CC: <x86@kernel.org>, <dvlasenk@redhat.com>, <JBeulich@suse.com>,
        <slaoub@gmail.com>, <luto@amacapital.net>,
        <dave.hansen@linux.intel.com>, <oleg@redhat.com>,
        <rostedt@goodmis.org>, <rusty@rustcorp.com.au>, <prarit@redhat.com>,
        <linux@rasmusvillemoes.dk>, <jroedel@suse.de>,
        <andriy.shevchenko@linux.intel.com>, <macro@linux-mips.org>,
        <wangnan0@huawei.com>, <linux-kernel@vger.kernel.org>,
        <linux-edac@vger.kernel.org>, <rric@kernel.org>
Subject: [PATCH V2 1/6] x86/MCE/AMD: Factor out logging mechanism
Date: Wed, 6 May 2015 06:58:53 -0500
Message-ID: <1430913538-1415-2-git-send-email-Aravind.Gopalakrishnan@amd.com>
In-Reply-To: <1430913538-1415-1-git-send-email-Aravind.Gopalakrishnan@amd.com>
References: <1430913538-1415-1-git-send-email-Aravind.Gopalakrishnan@amd.com>
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Refactoring the code here to setup struct mce and call
mce_log() to log the error.

No functional change is introduced.

Doing this so we can use it later to log error when
deferred error interrupts happen.

Suggested-by: Borislav Petkov <bp@alien8.de>
Signed-off-by: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com>
---
 arch/x86/kernel/cpu/mcheck/mce_amd.c | 30 ++++++++++++++++++++----------
 1 file changed, 20 insertions(+), 10 deletions(-)

diff --git a/arch/x86/kernel/cpu/mcheck/mce_amd.c b/arch/x86/kernel/cpu/mcheck/mce_amd.c
index 55ad9b3..60ae315 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_amd.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_amd.c
@@ -264,6 +264,24 @@ init:
 	}
 }
 
+static void __log_error(unsigned int bank, bool is_thr, u64 misc)
+{
+	struct mce m;
+
+	mce_setup(&m);
+	rdmsrl(MSR_IA32_MCx_STATUS(bank), m.status);
+	if (!(m.status & MCI_STATUS_VAL))
+		return;
+
+	if (is_thr)
+		m.misc = misc;
+
+	m.bank = bank;
+	mce_log(&m);
+
+	wrmsrl(MSR_IA32_MCx_STATUS(bank), 0);
+}
+
 /*
  * APIC Interrupt Handler
  */
@@ -273,12 +291,12 @@ init:
  * the interrupt goes off when error_count reaches threshold_limit.
  * the handler will simply log mcelog w/ software defined bank number.
  */
+
 static void amd_threshold_interrupt(void)
 {
 	u32 low = 0, high = 0, address = 0;
 	int cpu = smp_processor_id();
 	unsigned int bank, block;
-	struct mce m;
 
 	/* assume first bank caused it */
 	for (bank = 0; bank < mca_cfg.banks; ++bank) {
@@ -321,15 +339,7 @@ static void amd_threshold_interrupt(void)
 	return;
 
 log:
-	mce_setup(&m);
-	rdmsrl(MSR_IA32_MCx_STATUS(bank), m.status);
-	if (!(m.status & MCI_STATUS_VAL))
-		return;
-	m.misc = ((u64)high << 32) | low;
-	m.bank = bank;
-	mce_log(&m);
-
-	wrmsrl(MSR_IA32_MCx_STATUS(bank), 0);
+	__log_error(bank, true, ((u64)high << 32) | low);
 }
 
 /*
-- 
1.9.1

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