Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751772AbbEJTW4 (ORCPT ); Sun, 10 May 2015 15:22:56 -0400 Received: from mga02.intel.com ([134.134.136.20]:63115 "EHLO mga02.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751508AbbEJTWy (ORCPT ); Sun, 10 May 2015 15:22:54 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.13,402,1427785200"; d="scan'208";a="569185457" From: Andi Kleen To: peterz@infradead.org Cc: eranian@google.com, linux-kernel@vger.kernel.org Subject: perf: Add basic Skylake PMU support v2 Date: Sun, 10 May 2015 12:22:38 -0700 Message-Id: <1431285767-27027-1-git-send-email-andi@firstfloor.org> X-Mailer: git-send-email 1.9.3 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 957 Lines: 22 This patchkit adds support for the Intel Skylake core PMU to perf, documented in the recently released SDM 054[1] Vol3, 17.9 and 18.12. The main user visible feature is timed branch records, which allows to get cycle counts for individual basic blocks, and a time stamp for PEBS records which improves multi-record PEBS. The LBRs (branch records) also have been extended to 32, which allows more accurate branch sampling and deeper call stacks. v2: Fix time stamp handling with non default clock. Fix LBR freezing. Some minor cleanups. Moved user tools support for cycles into separate patchkit. -Andi [1] http://www.cps.intel.com/content/www/us/en/processors/architectures-software-developer-manuals.html -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/