Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753432AbbEMHR7 (ORCPT ); Wed, 13 May 2015 03:17:59 -0400 Received: from mx0a-0016f401.pphosted.com ([67.231.148.174]:19430 "EHLO mx0a-0016f401.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751954AbbEMHRz convert rfc822-to-8bit (ORCPT ); Wed, 13 May 2015 03:17:55 -0400 From: Lior Amsalem To: Andrew Lunn , Maxime Ripard CC: Vinod Koul , Dan Williams , Gregory Clement , Jason Cooper , Sebastian Hesselbarth , "dmaengine@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , "linux-crypto@vger.kernel.org" , Thomas Petazzoni , Herbert Xu , "David S. Miller" Subject: RE: [PATCH 8/8] ARM: mvebu: a38x: Enable A38x XOR engine features Thread-Topic: [PATCH 8/8] ARM: mvebu: a38x: Enable A38x XOR engine features Thread-Index: AQHQjMnxyxfml/eB3UKLDhSLKz8VdJ14UToAgAEsYMA= Date: Wed, 13 May 2015 07:16:34 +0000 Message-ID: <14c9a6d3ba4c46f89880e4c1b4494dbb@IL-EXCH02.marvell.com> References: <1431445063-20226-1-git-send-email-maxime.ripard@free-electrons.com> <1431445063-20226-9-git-send-email-maxime.ripard@free-electrons.com> <20150512161314.GL19927@lunn.ch> In-Reply-To: <20150512161314.GL19927@lunn.ch> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ms-exchange-transport-fromentityheader: Hosted x-originating-ip: [10.4.102.233] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 8BIT MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:5.14.151,1.0.33,0.0.0000 definitions=2015-05-13_02:2015-05-12,2015-05-13,1970-01-01 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=7.0.1-1402240000 definitions=main-1505130057 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 3084 Lines: 105 > From: Andrew Lunn [mailto:andrew@lunn.ch] > Sent: Tuesday, May 12, 2015 7:13 PM > > On Tue, May 12, 2015 at 05:37:43PM +0200, Maxime Ripard wrote: > > From: Lior Amsalem > > > > The new XOR engine has a new compatible of its own, together with new > > channel capabilities. > > > > Use that new compatible now that we have a driver that can handle it. > > > > Signed-off-by: Lior Amsalem > > Reviewed-by: Ofer Heifetz > > Reviewed-by: Nadav Haklai > > Tested-by: Nadav Haklai > > --- > > arch/arm/boot/dts/armada-38x.dtsi | 20 ++++++-------------- > > 1 file changed, 6 insertions(+), 14 deletions(-) > > > > diff --git a/arch/arm/boot/dts/armada-38x.dtsi > > b/arch/arm/boot/dts/armada-38x.dtsi > > index ed2dd8ba4080..6d07b7389415 100644 > > --- a/arch/arm/boot/dts/armada-38x.dtsi > > +++ b/arch/arm/boot/dts/armada-38x.dtsi > > @@ -448,7 +448,7 @@ > > }; > > > > xor@60800 { > > - compatible = "marvell,orion-xor"; > > + compatible = "marvell,a38x-xor"; > > reg = <0x60800 0x100 > > 0x60a00 0x100>; > > clocks = <&gateclk 22>; > > @@ -458,17 +458,13 @@ > > interrupts = IRQ_TYPE_LEVEL_HIGH>; > > dmacap,memcpy; > > dmacap,xor; > > - }; > > - xor01 { > > - interrupts = IRQ_TYPE_LEVEL_HIGH>; > > - dmacap,memcpy; > > - dmacap,xor; > > - dmacap,memset; > > + dmacap,pq; > > + dmacap,interrupt; > > Does this mean the hardware only has one channel? > And memset is no longer supported? > The hardware has two channels per engine and two engines. However, both on HW side (both channels are on the same "bus port") and SW (the dma subsystem will assign one channel per CPU). we found it's better (performance wise) to use only one channel on each engine and let the framework assign one per CPU. This way, descriptors chaining was better (cause of the depended descriptors problem) and overall interrupt number reduced. Yes, since memset is a problematic one. It can only be done via registers (and not on descriptors level) plus no one really needs it... > Andrew > > > > }; > > }; > > > > xor@60900 { > > - compatible = "marvell,orion-xor"; > > + compatible = "marvell,a38x-xor"; > > reg = <0x60900 0x100 > > 0x60b00 0x100>; > > clocks = <&gateclk 28>; > > @@ -478,12 +474,8 @@ > > interrupts = IRQ_TYPE_LEVEL_HIGH>; > > dmacap,memcpy; > > dmacap,xor; > > - }; > > - xor11 { > > - interrupts = IRQ_TYPE_LEVEL_HIGH>; > > - dmacap,memcpy; > > - dmacap,xor; > > - dmacap,memset; > > + dmacap,pq; > > + dmacap,interrupt; > > }; > > }; > > > > -- > > 2.4.0 > > Regards, Lior Amsalem -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/